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IntelFsp2Pkg: Correcting Data Region Length of MCUD section

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REF: https://bugzilla.tianocore.org/show_bug.cgi?id=4793

MCUD Data Region Length(DATA_LEN_OF_MCUD) pushed to stack
is incorrect for 64-bit. The Data occupied by MCUD section
is 32 bytes in 64-bit instead of 16 bytes in 32-bit. This
commit inputs the correct the Data Region Length for the
MCUD Section and also corrects the code that retrieves this
data.

Signed-off-by: Aravind P R <aravind.p.r@intel.com>
This commit is contained in:
Aravind P R 2024-07-08 17:02:24 +05:30 committed by mergify[bot]
parent a0594ca403
commit cc7bb9a86e
2 changed files with 10 additions and 11 deletions
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19
IntelFsp2Pkg/FspSecCore/SecFsp.c
View File

@ -53,7 +53,7 @@ SecGetPlatformData (
FSP_PLAT_DATA *FspPlatformData; FSP_PLAT_DATA *FspPlatformData;
UINT32 TopOfCar; UINT32 TopOfCar;
UINT32 *StackPtr; UINT32 *StackPtr;
UINT32 DwordSize; UINT32 DataSize;
UINT32 TemporaryRamSize; UINT32 TemporaryRamSize;
FspPlatformData = &FspData->PlatformData; FspPlatformData = &FspData->PlatformData;
@ -89,22 +89,21 @@ SecGetPlatformData (
// //
// This following data was pushed onto stack after TempRamInit API // This following data was pushed onto stack after TempRamInit API
// //
DwordSize = 4; DataSize = *(StackPtr);
StackPtr = StackPtr - 1 - DwordSize; DataSize = DataSize / sizeof (DataSize);
CopyMem (&(FspPlatformData->MicrocodeRegionBase), StackPtr, (DwordSize << 2)); StackPtr -= DataSize;
StackPtr--; CopyMem (&(FspPlatformData->MicrocodeRegionBase), StackPtr + 1, 4 * sizeof (UINTN));
} else if (*(StackPtr - 1) == FSP_PER0_SIGNATURE) { } else if (*(StackPtr - 1) == FSP_PER0_SIGNATURE) {
// //
// This is the performance data for InitTempMemory API entry/exit // This is the performance data for InitTempMemory API entry/exit
// //
DwordSize = 4; DataSize = *(StackPtr);
StackPtr = StackPtr - 1 - DwordSize; DataSize = DataSize / sizeof (DataSize);
CopyMem (FspData->PerfData, StackPtr, (DwordSize << 2)); StackPtr -= DataSize;
CopyMem (FspData->PerfData, StackPtr + 1, 2 * sizeof (UINT64)); // Copy from the end of the PER0 data
((UINT8 *)(&FspData->PerfData[0]))[7] = FSP_PERF_ID_API_TEMP_RAM_INIT_ENTRY; ((UINT8 *)(&FspData->PerfData[0]))[7] = FSP_PERF_ID_API_TEMP_RAM_INIT_ENTRY;
((UINT8 *)(&FspData->PerfData[1]))[7] = FSP_PERF_ID_API_TEMP_RAM_INIT_EXIT; ((UINT8 *)(&FspData->PerfData[1]))[7] = FSP_PERF_ID_API_TEMP_RAM_INIT_EXIT;
StackPtr--;
} else { } else {
StackPtr -= (*StackPtr); StackPtr -= (*StackPtr);
} }

2
IntelFsp2Pkg/FspSecCore/X64/FspApiEntryT.nasm
View File

@ -30,7 +30,7 @@ extern ASM_PFX(SecCarInit)
; Define the data length that we saved on the stack top ; Define the data length that we saved on the stack top
; ;
DATA_LEN_OF_PER0 EQU 18h DATA_LEN_OF_PER0 EQU 18h
DATA_LEN_OF_MCUD EQU 18h DATA_LEN_OF_MCUD EQU 28h
DATA_LEN_AT_STACK_TOP EQU (DATA_LEN_OF_PER0 + DATA_LEN_OF_MCUD + 4) DATA_LEN_AT_STACK_TOP EQU (DATA_LEN_OF_PER0 + DATA_LEN_OF_MCUD + 4)
; ;