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ArmPkg/ArmMmuLib: base page table VA size on GCD memory map size 

As reported by Eugene, the practice of sizing the address space in the
virtual memory system based on the maximum address in the table passed
to ArmConfigureMmu() is problematic, since it fails to take into account
the fact that the GCD memory space may be extended at a later time, both
for memory and for MMIO. So instead, choose the VA size identical to the
GCD memory map size, which is based on PcdPrePiCpuMemorySize on ARM
systems.

Reported-by: Eugene Cohen <eugene@hp.com>
Contributed-under: TianoCore Contribution Agreement 1.0
Signed-off-by: Ard Biesheuvel <ard.biesheuvel@linaro.org>
Reviewed-by: Eugene Cohen <eugene@hp.com>
Reviewed-by: Leif Lindholm <leif.lindholm@linaro.org>
This commit is contained in:
Ard Biesheuvel 2016-09-09 09:01:56 +01:00
parent d32702d2c2
commit dd82465a9f
3 changed files with 10 additions and 12 deletions
Show Stats Download Patch File Download Diff File Expand all files Collapse all files

14
ArmPkg/Library/ArmMmuLib/AArch64/ArmMmuLibCore.c
View File

@ -555,9 +555,7 @@ ArmConfigureMmu (
VOID* TranslationTable; VOID* TranslationTable;
VOID* TranslationTableBuffer; VOID* TranslationTableBuffer;
UINT32 TranslationTableAttribute; UINT32 TranslationTableAttribute;
ARM_MEMORY_REGION_DESCRIPTOR *MemoryTableEntry;
UINT64 MaxAddress; UINT64 MaxAddress;
UINT64 TopAddress;
UINTN T0SZ; UINTN T0SZ;
UINTN RootTableEntryCount; UINTN RootTableEntryCount;
UINTN RootTableEntrySize; UINTN RootTableEntrySize;
@ -569,16 +567,8 @@ ArmConfigureMmu (
return RETURN_INVALID_PARAMETER; return RETURN_INVALID_PARAMETER;
} }
// Identify the highest address of the memory table // Cover the entire GCD memory space
MaxAddress = MemoryTable->PhysicalBase + MemoryTable->Length - 1; MaxAddress = (1UL << PcdGet8 (PcdPrePiCpuMemorySize)) - 1;
MemoryTableEntry = MemoryTable;
while (MemoryTableEntry->Length != 0) {
TopAddress = MemoryTableEntry->PhysicalBase + MemoryTableEntry->Length - 1;
if (TopAddress > MaxAddress) {
MaxAddress = TopAddress;
}
MemoryTableEntry++;
}
// Lookup the Table Level to get the information // Lookup the Table Level to get the information
LookupAddresstoRootTable (MaxAddress, &T0SZ, &RootTableEntryCount); LookupAddresstoRootTable (MaxAddress, &T0SZ, &RootTableEntryCount);

4
ArmPkg/Library/ArmMmuLib/ArmMmuBaseLib.inf
View File

@ -32,6 +32,7 @@
[Packages] [Packages]
ArmPkg/ArmPkg.dec ArmPkg/ArmPkg.dec
EmbeddedPkg/EmbeddedPkg.dec
MdePkg/MdePkg.dec MdePkg/MdePkg.dec
[LibraryClasses] [LibraryClasses]
@ -39,5 +40,8 @@
CacheMaintenanceLib CacheMaintenanceLib
MemoryAllocationLib MemoryAllocationLib
[Pcd.AARCH64]
gEmbeddedTokenSpaceGuid.PcdPrePiCpuMemorySize
[Pcd.ARM] [Pcd.ARM]
gArmTokenSpaceGuid.PcdNormalMemoryNonshareableOverride gArmTokenSpaceGuid.PcdNormalMemoryNonshareableOverride

4
ArmPkg/Library/ArmMmuLib/ArmMmuPeiLib.inf
View File

@ -28,9 +28,13 @@
[Packages] [Packages]
ArmPkg/ArmPkg.dec ArmPkg/ArmPkg.dec
EmbeddedPkg/EmbeddedPkg.dec
MdePkg/MdePkg.dec MdePkg/MdePkg.dec
[LibraryClasses] [LibraryClasses]
ArmLib ArmLib
CacheMaintenanceLib CacheMaintenanceLib
MemoryAllocationLib MemoryAllocationLib
[Pcd.AARCH64]
gEmbeddedTokenSpaceGuid.PcdPrePiCpuMemorySize