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ArmPlatformPkg/ArmVExpressLibRTSM: Added support for the additional 2GB memory of DRAM on FVP 

The FVP Base and Foundation models have additional DRAM regions at
0x08_8000_0000.

Contributed-under: TianoCore Contribution Agreement 1.0
Signed-off-by: Olivier Martin <olivier.martin@arm.com>



git-svn-id: https://svn.code.sf.net/p/edk2/code/trunk/edk2@15461 6f19259b-4bc3-4df7-8a09-765794883524
This commit is contained in:
Olivier Martin 2014-04-11 15:58:54 +00:00 committed by oliviermartin
parent 3e8ddb4a03
commit df44112bda
3 changed files with 47 additions and 4 deletions
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3
ArmPlatformPkg/ArmVExpressPkg/Library/ArmVExpressLibRTSM/ArmVExpressFoundationLib.inf
View File

@ -1,5 +1,5 @@
#/* @file
# Copyright (c) 2011-2013, ARM Limited. All rights reserved.
# Copyright (c) 2011-2014, ARM Limited. All rights reserved.
#
# This program and the accompanying materials
# are licensed and made available under the terms and conditions of the BSD License
@ -32,6 +32,7 @@
MemoryAllocationLib
SerialPortLib
PrintLib
HobLib
[Sources.common]
RTSMFoundation.c

3
ArmPlatformPkg/ArmVExpressPkg/Library/ArmVExpressLibRTSM/ArmVExpressLib.inf
View File

@ -1,5 +1,5 @@
#/* @file
# Copyright (c) 2011-2013, ARM Limited. All rights reserved.
# Copyright (c) 2011-2014, ARM Limited. All rights reserved.
#
# This program and the accompanying materials
# are licensed and made available under the terms and conditions of the BSD License
@ -31,6 +31,7 @@
ArmLib
MemoryAllocationLib
SerialPortLib
HobLib
[Sources.common]
RTSM.c

43
ArmPlatformPkg/ArmVExpressPkg/Library/ArmVExpressLibRTSM/RTSMMem.c
View File

@ -14,13 +14,14 @@
#include <Library/ArmPlatformLib.h>
#include <Library/DebugLib.h>
#include <Library/HobLib.h>
#include <Library/PcdLib.h>
#include <Library/IoLib.h>
#include <Library/MemoryAllocationLib.h>
#include <ArmPlatform.h>
// Number of Virtual Memory Map Descriptors
#define MAX_VIRTUAL_MEMORY_MAP_DESCRIPTORS 5
#define MAX_VIRTUAL_MEMORY_MAP_DESCRIPTORS 6
// DDR attributes
#define DDR_ATTRIBUTES_CACHED ARM_MEMORY_REGION_ATTRIBUTE_WRITE_BACK
@ -42,11 +43,43 @@ ArmPlatformGetVirtualMemoryMap (
)
{
ARM_MEMORY_REGION_ATTRIBUTES CacheAttributes;
EFI_RESOURCE_ATTRIBUTE_TYPE ResourceAttributes;
UINTN Index = 0;
ARM_MEMORY_REGION_DESCRIPTOR *VirtualMemoryTable;
UINT32 SysId;
BOOLEAN HasSparseMemory;
EFI_VIRTUAL_ADDRESS SparseMemoryBase;
UINT64 SparseMemorySize;
ASSERT (VirtualMemoryMap != NULL);
// The FVP model has Sparse memory
SysId = MmioRead32 (ARM_VE_SYS_ID_REG);
if (SysId != ARM_RTSM_SYS_ID) {
HasSparseMemory = TRUE;
ResourceAttributes =
EFI_RESOURCE_ATTRIBUTE_PRESENT |
EFI_RESOURCE_ATTRIBUTE_INITIALIZED |
EFI_RESOURCE_ATTRIBUTE_UNCACHEABLE |
EFI_RESOURCE_ATTRIBUTE_WRITE_COMBINEABLE |
EFI_RESOURCE_ATTRIBUTE_WRITE_THROUGH_CACHEABLE |
EFI_RESOURCE_ATTRIBUTE_WRITE_BACK_CACHEABLE |
EFI_RESOURCE_ATTRIBUTE_TESTED;
// Declared the additional DRAM from 2GB to 4GB
SparseMemoryBase = 0x0880000000;
SparseMemorySize = SIZE_2GB;
BuildResourceDescriptorHob (
EFI_RESOURCE_SYSTEM_MEMORY,
ResourceAttributes,
SparseMemoryBase,
SparseMemorySize);
} else {
HasSparseMemory = FALSE;
}
VirtualMemoryTable = (ARM_MEMORY_REGION_DESCRIPTOR*)AllocatePages(EFI_SIZE_TO_PAGES (sizeof(ARM_MEMORY_REGION_DESCRIPTOR) * MAX_VIRTUAL_MEMORY_MAP_DESCRIPTORS));
if (VirtualMemoryTable == NULL) {
return;
@ -105,6 +138,14 @@ ArmPlatformGetVirtualMemoryMap (
VirtualMemoryTable[Index].Length = 2 * ARM_VE_SMB_PERIPH_SZ;
VirtualMemoryTable[Index].Attributes = ARM_MEMORY_REGION_ATTRIBUTE_DEVICE;
// Map sparse memory region if present
if (HasSparseMemory) {
VirtualMemoryTable[++Index].PhysicalBase = SparseMemoryBase;
VirtualMemoryTable[Index].VirtualBase = SparseMemoryBase;
VirtualMemoryTable[Index].Length = SparseMemorySize;
VirtualMemoryTable[Index].Attributes = CacheAttributes;
}
// End of Table
VirtualMemoryTable[++Index].PhysicalBase = 0;
VirtualMemoryTable[Index].VirtualBase = 0;