mirror of https://github.com/acidanthera/audk.git
UefiCpuPkg/CpuExceptionHandlerLib:Remove.S files for IA32 and X64 arch
.nasm file has been added for X86 arch. .S assembly code is not required any more. https://bugzilla.tianocore.org/show_bug.cgi?id=1594 Cc: Michael D Kinney <michael.d.kinney@intel.com> Cc: Liming Gao <liming.gao@intel.com> Contributed-under: TianoCore Contribution Agreement 1.1 Signed-off-by: Shenglei Zhang <shenglei.zhang@intel.com> Reviewed-by: Eric Dong <eric.dong@intel.com> Reviewed-by: Liming Gao <liming.gao@intel.com>
This commit is contained in:
Shenglei Zhang
Liming Gao
parent
b2d13be506
commit
df6c5f01e1
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@ -30,13 +30,11 @@
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[Sources.Ia32]
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Ia32/ExceptionHandlerAsm.nasm
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Ia32/ExceptionTssEntryAsm.nasm
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Ia32/ExceptionHandlerAsm.S
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Ia32/ArchExceptionHandler.c
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Ia32/ArchInterruptDefs.h
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[Sources.X64]
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X64/ExceptionHandlerAsm.nasm
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X64/ExceptionHandlerAsm.S
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X64/ArchExceptionHandler.c
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X64/ArchInterruptDefs.h
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@ -1,667 +0,0 @@
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#------------------------------------------------------------------------------
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#*
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#* Copyright (c) 2012 - 2015, Intel Corporation. All rights reserved.<BR>
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#* This program and the accompanying materials
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#* are licensed and made available under the terms and conditions of the BSD License
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#* which accompanies this distribution. The full text of the license may be found at
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#* http://opensource.org/licenses/bsd-license.php
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#*
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#* THE PROGRAM IS DISTRIBUTED UNDER THE BSD LICENSE ON AN "AS IS" BASIS,
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#* WITHOUT WARRANTIES OR REPRESENTATIONS OF ANY KIND, EITHER EXPRESS OR IMPLIED.
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#*
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#* ExceptionHandlerAsm.S
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#*
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#* Abstract:
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#*
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#* IA32 CPU Exception Handler
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#
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#------------------------------------------------------------------------------
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#.MMX
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#.XMM
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ASM_GLOBAL ASM_PFX(CommonExceptionHandler)
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ASM_GLOBAL ASM_PFX(CommonInterruptEntry)
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ASM_GLOBAL ASM_PFX(HookAfterStubHeaderEnd)
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#EXTRN ASM_PFX(mErrorCodeFlag):DWORD # Error code flags for exceptions
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#EXTRN ASM_PFX(mDoFarReturnFlag):DWORD # Do far return flag
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.text
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#
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# exception handler stub table
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#
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Exception0Handle:
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.byte 0x6a # push #VectorNum
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.byte 0
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pushl %eax
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.byte 0xB8
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.long ASM_PFX(CommonInterruptEntry)
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jmp *%eax
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Exception1Handle:
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.byte 0x6a # push #VectorNum
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.byte 1
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pushl %eax
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.byte 0xB8
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.long ASM_PFX(CommonInterruptEntry)
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jmp *%eax
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Exception2Handle:
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.byte 0x6a # push #VectorNum
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.byte 2
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pushl %eax
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.byte 0xB8
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.long ASM_PFX(CommonInterruptEntry)
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jmp *%eax
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Exception3Handle:
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.byte 0x6a # push #VectorNum
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.byte 3
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pushl %eax
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.byte 0xB8
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.long ASM_PFX(CommonInterruptEntry)
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jmp *%eax
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Exception4Handle:
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.byte 0x6a # push #VectorNum
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.byte 4
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pushl %eax
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.byte 0xB8
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.long ASM_PFX(CommonInterruptEntry)
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jmp *%eax
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Exception5Handle:
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.byte 0x6a # push #VectorNum
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.byte 5
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pushl %eax
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.byte 0xB8
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.long ASM_PFX(CommonInterruptEntry)
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jmp *%eax
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Exception6Handle:
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.byte 0x6a # push #VectorNum
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.byte 6
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pushl %eax
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.byte 0xB8
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.long ASM_PFX(CommonInterruptEntry)
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jmp *%eax
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Exception7Handle:
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.byte 0x6a # push #VectorNum
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.byte 7
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pushl %eax
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.byte 0xB8
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.long ASM_PFX(CommonInterruptEntry)
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jmp *%eax
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Exception8Handle:
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.byte 0x6a # push #VectorNum
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.byte 8
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pushl %eax
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.byte 0xB8
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.long ASM_PFX(CommonInterruptEntry)
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jmp *%eax
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Exception9Handle:
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.byte 0x6a # push #VectorNum
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.byte 9
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pushl %eax
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.byte 0xB8
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.long ASM_PFX(CommonInterruptEntry)
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jmp *%eax
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Exception10Handle:
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.byte 0x6a # push #VectorNum
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.byte 10
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pushl %eax
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.byte 0xB8
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.long ASM_PFX(CommonInterruptEntry)
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jmp *%eax
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Exception11Handle:
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.byte 0x6a # push #VectorNum
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.byte 11
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pushl %eax
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.byte 0xB8
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.long ASM_PFX(CommonInterruptEntry)
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jmp *%eax
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Exception12Handle:
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.byte 0x6a # push #VectorNum
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.byte 12
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pushl %eax
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.byte 0xB8
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.long ASM_PFX(CommonInterruptEntry)
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jmp *%eax
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Exception13Handle:
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.byte 0x6a # push #VectorNum
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.byte 13
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pushl %eax
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.byte 0xB8
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.long ASM_PFX(CommonInterruptEntry)
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jmp *%eax
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Exception14Handle:
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.byte 0x6a # push #VectorNum
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.byte 14
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pushl %eax
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.byte 0xB8
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.long ASM_PFX(CommonInterruptEntry)
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jmp *%eax
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Exception15Handle:
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.byte 0x6a # push #VectorNum
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.byte 15
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pushl %eax
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.byte 0xB8
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.long ASM_PFX(CommonInterruptEntry)
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jmp *%eax
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Exception16Handle:
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.byte 0x6a # push #VectorNum
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.byte 16
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pushl %eax
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.byte 0xB8
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.long ASM_PFX(CommonInterruptEntry)
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jmp *%eax
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Exception17Handle:
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.byte 0x6a # push #VectorNum
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.byte 17
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pushl %eax
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.byte 0xB8
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.long ASM_PFX(CommonInterruptEntry)
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jmp *%eax
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Exception18Handle:
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.byte 0x6a # push #VectorNum
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.byte 18
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pushl %eax
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.byte 0xB8
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.long ASM_PFX(CommonInterruptEntry)
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jmp *%eax
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Exception19Handle:
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.byte 0x6a # push #VectorNum
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.byte 19
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pushl %eax
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.byte 0xB8
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.long ASM_PFX(CommonInterruptEntry)
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jmp *%eax
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Exception20Handle:
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.byte 0x6a # push #VectorNum
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.byte 20
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pushl %eax
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.byte 0xB8
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.long ASM_PFX(CommonInterruptEntry)
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jmp *%eax
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Exception21Handle:
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.byte 0x6a # push #VectorNum
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.byte 21
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pushl %eax
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.byte 0xB8
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.long ASM_PFX(CommonInterruptEntry)
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jmp *%eax
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Exception22Handle:
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.byte 0x6a # push #VectorNum
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.byte 22
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pushl %eax
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.byte 0xB8
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.long ASM_PFX(CommonInterruptEntry)
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jmp *%eax
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Exception23Handle:
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.byte 0x6a # push #VectorNum
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.byte 23
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pushl %eax
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.byte 0xB8
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.long ASM_PFX(CommonInterruptEntry)
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jmp *%eax
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Exception24Handle:
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.byte 0x6a # push #VectorNum
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.byte 24
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pushl %eax
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.byte 0xB8
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.long ASM_PFX(CommonInterruptEntry)
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jmp *%eax
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Exception25Handle:
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.byte 0x6a # push #VectorNum
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.byte 25
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pushl %eax
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.byte 0xB8
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.long ASM_PFX(CommonInterruptEntry)
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jmp *%eax
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Exception26Handle:
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.byte 0x6a # push #VectorNum
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.byte 26
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pushl %eax
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.byte 0xB8
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.long ASM_PFX(CommonInterruptEntry)
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jmp *%eax
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Exception27Handle:
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.byte 0x6a # push #VectorNum
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.byte 27
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pushl %eax
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.byte 0xB8
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.long ASM_PFX(CommonInterruptEntry)
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jmp *%eax
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Exception28Handle:
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.byte 0x6a # push #VectorNum
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.byte 28
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pushl %eax
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.byte 0xB8
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.long ASM_PFX(CommonInterruptEntry)
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jmp *%eax
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Exception29Handle:
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.byte 0x6a # push #VectorNum
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.byte 29
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pushl %eax
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.byte 0xB8
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.long ASM_PFX(CommonInterruptEntry)
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jmp *%eax
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Exception30Handle:
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.byte 0x6a # push #VectorNum
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.byte 30
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pushl %eax
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.byte 0xB8
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.long ASM_PFX(CommonInterruptEntry)
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jmp *%eax
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Exception31Handle:
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.byte 0x6a # push #VectorNum
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.byte 31
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pushl %eax
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.byte 0xB8
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.long ASM_PFX(CommonInterruptEntry)
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jmp *%eax
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HookAfterStubBegin:
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.byte 0x6a # push
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VectorNum:
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.byte 0 # 0 will be fixed
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pushl %eax
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.byte 0xB8 # movl ASM_PFX(HookAfterStubHeaderEnd), %eax
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.long ASM_PFX(HookAfterStubHeaderEnd)
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jmp *%eax
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ASM_GLOBAL ASM_PFX(HookAfterStubHeaderEnd)
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ASM_PFX(HookAfterStubHeaderEnd):
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popl %eax
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subl $8, %esp # reserve room for filling exception data later
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pushl 8(%esp)
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xchgl (%esp), %ecx # get vector number
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bt %ecx, ASM_PFX(mErrorCodeFlag)
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jnc NoErrorData
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pushl (%esp) # addition push if exception data needed
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NoErrorData:
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xchg (%esp), %ecx # restore ecx
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pushl %eax
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#---------------------------------------;
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# CommonInterruptEntry ;
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#---------------------------------------;
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# The follow algorithm is used for the common interrupt routine.
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ASM_GLOBAL ASM_PFX(CommonInterruptEntry)
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ASM_PFX(CommonInterruptEntry):
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cli
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popl %eax
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#
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# All interrupt handlers are invoked through interrupt gates, so
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# IF flag automatically cleared at the entry point
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#
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#
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# Get vector number from top of stack
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#
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xchgl (%esp), %ecx
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andl $0x0FF, %ecx # Vector number should be less than 256
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cmpl $32, %ecx # Intel reserved vector for exceptions?
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jae NoErrorCode
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bt %ecx, ASM_PFX(mErrorCodeFlag)
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jc HasErrorCode
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NoErrorCode:
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#
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# Stack:
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# +---------------------+
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# + EFlags +
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# +---------------------+
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# + CS +
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# +---------------------+
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# + EIP +
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# +---------------------+
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# + ECX +
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# +---------------------+ <-- ESP
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#
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# Registers:
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# ECX - Vector Number
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#
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#
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# Put Vector Number on stack
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#
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pushl %ecx
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#
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# Put 0 (dummy) error code on stack, and restore ECX
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#
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xorl %ecx, %ecx # ECX = 0
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xchgl 4(%esp), %ecx
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jmp ErrorCodeAndVectorOnStack
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HasErrorCode:
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#
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# Stack:
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# +---------------------+
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# + EFlags +
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# +---------------------+
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# + CS +
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# +---------------------+
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# + EIP +
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# +---------------------+
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# + Error Code +
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# +---------------------+
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# + ECX +
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# +---------------------+ <-- ESP
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#
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# Registers:
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# ECX - Vector Number
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#
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#
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# Put Vector Number on stack and restore ECX
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#
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xchgl (%esp), %ecx
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ErrorCodeAndVectorOnStack:
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pushl %ebp
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movl %esp, %ebp
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#
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# Stack:
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# +---------------------+
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# + EFlags +
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# +---------------------+
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# + CS +
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# +---------------------+
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# + EIP +
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# +---------------------+
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# + Error Code +
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# +---------------------+
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# + Vector Number +
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# +---------------------+
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# + EBP +
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# +---------------------+ <-- EBP
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#
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#
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# Align stack to make sure that EFI_FX_SAVE_STATE_IA32 of EFI_SYSTEM_CONTEXT_IA32
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# is 16-byte aligned
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#
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andl $0x0fffffff0, %esp
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subl $12, %esp
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subl $8, %esp
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pushl $0 # check EXCEPTION_HANDLER_CONTEXT.OldIdtHandler
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pushl $0 # check EXCEPTION_HANDLER_CONTEXT.ExceptionDataFlag
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#; UINT32 Edi, Esi, Ebp, Esp, Ebx, Edx, Ecx, Eax;
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pushl %eax
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pushl %ecx
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pushl %edx
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pushl %ebx
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leal 24(%ebp), %ecx
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pushl %ecx # ESP
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pushl (%ebp) # EBP
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pushl %esi
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pushl %edi
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#; UINT32 Gs, Fs, Es, Ds, Cs, Ss;
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movl %ss, %eax
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pushl %eax
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movzwl 16(%ebp), %eax
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pushl %eax
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movl %ds, %eax
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pushl %eax
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movl %es, %eax
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pushl %eax
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movl %fs, %eax
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pushl %eax
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movl %gs, %eax
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pushl %eax
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#; UINT32 Eip;
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movl 12(%ebp), %eax
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pushl %eax
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#; UINT32 Gdtr[2], Idtr[2];
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subl $8, %esp
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sidt (%esp)
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movl 2(%esp), %eax
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xchgl (%esp), %eax
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andl $0x0FFFF, %eax
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movl %eax, 4(%esp)
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|
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subl $8, %esp
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sgdt (%esp)
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movl 2(%esp), %eax
|
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xchgl (%esp), %eax
|
||||
andl $0x0FFFF, %eax
|
||||
movl %eax, 4(%esp)
|
||||
|
||||
#; UINT32 Ldtr, Tr;
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xorl %eax, %eax
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str %ax
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pushl %eax
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sldt %ax
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pushl %eax
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||||
|
||||
#; UINT32 EFlags;
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movl 20(%ebp), %eax
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pushl %eax
|
||||
|
||||
#; UINT32 Cr0, Cr1, Cr2, Cr3, Cr4;
|
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## insure FXSAVE/FXRSTOR is enabled in CR4...
|
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## ... while we're at it, make sure DE is also enabled...
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mov $1, %eax
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||||
pushl %ebx # temporarily save value of ebx on stack
|
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cpuid # use CPUID to determine if FXSAVE/FXRESTOR
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# and DE are supported
|
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popl %ebx # retore value of ebx that was overwritten
|
||||
# by CPUID
|
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movl %cr4, %eax
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pushl %eax # push cr4 firstly
|
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testl $BIT24, %edx # Test for FXSAVE/FXRESTOR support
|
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jz L1
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orl $BIT9, %eax # Set CR4.OSFXSR
|
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L1:
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testl $BIT2, %edx # Test for Debugging Extensions support
|
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jz L2
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||||
orl $BIT3, %eax # Set CR4.DE
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||||
L2:
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movl %eax, %cr4
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movl %cr3, %eax
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||||
pushl %eax
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||||
movl %cr2, %eax
|
||||
pushl %eax
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||||
xorl %eax, %eax
|
||||
pushl %eax
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||||
movl %cr0, %eax
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||||
pushl %eax
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||||
|
||||
#; UINT32 Dr0, Dr1, Dr2, Dr3, Dr6, Dr7;
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||||
movl %dr7, %eax
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||||
pushl %eax
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||||
movl %dr6, %eax
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||||
pushl %eax
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||||
movl %dr3, %eax
|
||||
pushl %eax
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||||
movl %dr2, %eax
|
||||
pushl %eax
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||||
movl %dr1, %eax
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||||
pushl %eax
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||||
movl %dr0, %eax
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||||
pushl %eax
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||||
|
||||
#; FX_SAVE_STATE_IA32 FxSaveState;
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||||
subl $512, %esp
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||||
movl %esp, %edi
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testl $BIT24, %edx # Test for FXSAVE/FXRESTOR support.
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||||
# edx still contains result from CPUID above
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||||
jz L3
|
||||
.byte 0x0f, 0x0ae, 0x07 #fxsave [edi]
|
||||
L3:
|
||||
|
||||
#; UEFI calling convention for IA32 requires that Direction flag in EFLAGs is clear
|
||||
cld
|
||||
|
||||
#; UINT32 ExceptionData;
|
||||
pushl 8(%ebp)
|
||||
|
||||
#; Prepare parameter and call
|
||||
movl %esp, %edx
|
||||
pushl %edx
|
||||
movl 4(%ebp), %edx
|
||||
pushl %edx
|
||||
|
||||
#
|
||||
# Call External Exception Handler
|
||||
#
|
||||
call ASM_PFX(CommonExceptionHandler)
|
||||
addl $8, %esp
|
||||
|
||||
cli
|
||||
#; UINT32 ExceptionData;
|
||||
addl $4, %esp
|
||||
|
||||
#; FX_SAVE_STATE_IA32 FxSaveState;
|
||||
movl %esp, %esi
|
||||
movl $1, %eax
|
||||
cpuid # use CPUID to determine if FXSAVE/FXRESTOR
|
||||
# are supported
|
||||
testl $BIT24, %edx # Test for FXSAVE/FXRESTOR support
|
||||
jz L4
|
||||
.byte 0x0f, 0x0ae, 0x0e # fxrstor [esi]
|
||||
L4:
|
||||
addl $512, %esp
|
||||
|
||||
#; UINT32 Dr0, Dr1, Dr2, Dr3, Dr6, Dr7;
|
||||
#; Skip restoration of DRx registers to support in-circuit emualators
|
||||
#; or debuggers set breakpoint in interrupt/exception context
|
||||
addl $24, %esp
|
||||
|
||||
#; UINT32 Cr0, Cr1, Cr2, Cr3, Cr4;
|
||||
popl %eax
|
||||
movl %eax, %cr0
|
||||
addl $4, %esp # not for Cr1
|
||||
popl %eax
|
||||
movl %eax, %cr2
|
||||
popl %eax
|
||||
movl %eax, %cr3
|
||||
popl %eax
|
||||
movl %eax, %cr4
|
||||
|
||||
#; UINT32 EFlags;
|
||||
popl 20(%ebp)
|
||||
|
||||
#; UINT32 Ldtr, Tr;
|
||||
#; UINT32 Gdtr[2], Idtr[2];
|
||||
#; Best not let anyone mess with these particular registers...
|
||||
addl $24, %esp
|
||||
|
||||
#; UINT32 Eip;
|
||||
popl 12(%ebp)
|
||||
|
||||
#; UINT32 Gs, Fs, Es, Ds, Cs, Ss;
|
||||
#; NOTE - modified segment registers could hang the debugger... We
|
||||
#; could attempt to insulate ourselves against this possibility,
|
||||
#; but that poses risks as well.
|
||||
#;
|
||||
popl %gs
|
||||
popl %fs
|
||||
popl %es
|
||||
popl %ds
|
||||
popl 16(%ebp)
|
||||
popl %ss
|
||||
|
||||
#; UINT32 Edi, Esi, Ebp, Esp, Ebx, Edx, Ecx, Eax;
|
||||
popl %edi
|
||||
popl %esi
|
||||
addl $4, %esp # not for ebp
|
||||
addl $4, %esp # not for esp
|
||||
popl %ebx
|
||||
popl %edx
|
||||
popl %ecx
|
||||
popl %eax
|
||||
|
||||
popl -8(%ebp)
|
||||
popl -4(%ebp)
|
||||
movl %ebp, %esp
|
||||
popl %ebp
|
||||
addl $8, %esp
|
||||
cmpl $0, -16(%esp) # check EXCEPTION_HANDLER_CONTEXT.OldIdtHandler
|
||||
jz DoReturn
|
||||
cmpl $1, -20(%esp) # check EXCEPTION_HANDLER_CONTEXT.ExceptionDataFlag
|
||||
jz ErrorCode
|
||||
jmp *-16(%esp)
|
||||
ErrorCode:
|
||||
subl $4, %esp
|
||||
jmp *-12(%esp)
|
||||
|
||||
DoReturn:
|
||||
cmpl $0, ASM_PFX(mDoFarReturnFlag)
|
||||
jz DoIret
|
||||
pushl 8(%esp) # save EFLAGS
|
||||
addl $16, %esp
|
||||
pushl -8(%esp) # save CS in new location
|
||||
pushl -8(%esp) # save EIP in new location
|
||||
pushl -8(%esp) # save EFLAGS in new location
|
||||
popfl # restore EFLAGS
|
||||
lret # far return
|
||||
|
||||
DoIret:
|
||||
iretl
|
||||
|
||||
|
||||
#---------------------------------------;
|
||||
# _AsmGetTemplateAddressMap ;
|
||||
#---------------------------------------;
|
||||
#
|
||||
# Protocol prototype
|
||||
# AsmGetTemplateAddressMap (
|
||||
# EXCEPTION_HANDLER_TEMPLATE_MAP *AddressMap
|
||||
# );
|
||||
#
|
||||
# Routine Description:
|
||||
#
|
||||
# Return address map of interrupt handler template so that C code can generate
|
||||
# interrupt table.
|
||||
#
|
||||
# Arguments:
|
||||
#
|
||||
#
|
||||
# Returns:
|
||||
#
|
||||
# Nothing
|
||||
#
|
||||
#
|
||||
# Input: [ebp][0] = Original ebp
|
||||
# [ebp][4] = Return address
|
||||
#
|
||||
# Output: Nothing
|
||||
#
|
||||
# Destroys: Nothing
|
||||
#-----------------------------------------------------------------------------;
|
||||
#-------------------------------------------------------------------------------------
|
||||
# AsmGetAddressMap (&AddressMap);
|
||||
#-------------------------------------------------------------------------------------
|
||||
ASM_GLOBAL ASM_PFX(AsmGetTemplateAddressMap)
|
||||
ASM_PFX(AsmGetTemplateAddressMap):
|
||||
|
||||
pushl %ebp
|
||||
movl %esp,%ebp
|
||||
pushal
|
||||
|
||||
movl 0x8(%ebp), %ebx
|
||||
movl $Exception0Handle, (%ebx)
|
||||
movl $(Exception1Handle - Exception0Handle), 0x4(%ebx)
|
||||
movl $(HookAfterStubBegin), 0x8(%ebx)
|
||||
|
||||
popal
|
||||
popl %ebp
|
||||
ret
|
||||
#-------------------------------------------------------------------------------------
|
||||
# AsmVectorNumFixup (*NewVectorAddr, VectorNum, *OldVectorAddr);
|
||||
#-------------------------------------------------------------------------------------
|
||||
ASM_GLOBAL ASM_PFX(AsmVectorNumFixup)
|
||||
ASM_PFX(AsmVectorNumFixup):
|
||||
movl 8(%esp), %eax
|
||||
movl 4(%esp), %ecx
|
||||
movb %al, (VectorNum - HookAfterStubBegin)(%ecx)
|
||||
ret
|
||||
|
|
@ -30,13 +30,11 @@
|
|||
[Sources.Ia32]
|
||||
Ia32/ExceptionHandlerAsm.nasm
|
||||
Ia32/ExceptionTssEntryAsm.nasm
|
||||
Ia32/ExceptionHandlerAsm.S
|
||||
Ia32/ArchExceptionHandler.c
|
||||
Ia32/ArchInterruptDefs.h
|
||||
|
||||
[Sources.X64]
|
||||
X64/ExceptionHandlerAsm.nasm
|
||||
X64/ExceptionHandlerAsm.S
|
||||
X64/ArchExceptionHandler.c
|
||||
X64/ArchInterruptDefs.h
|
||||
|
||||
|
|
|
|||
|
|
@ -30,13 +30,11 @@
|
|||
[Sources.Ia32]
|
||||
Ia32/ExceptionHandlerAsm.nasm
|
||||
Ia32/ExceptionTssEntryAsm.nasm
|
||||
Ia32/ExceptionHandlerAsm.S
|
||||
Ia32/ArchExceptionHandler.c
|
||||
Ia32/ArchInterruptDefs.h
|
||||
|
||||
[Sources.X64]
|
||||
X64/ExceptionHandlerAsm.nasm
|
||||
X64/ExceptionHandlerAsm.S
|
||||
X64/ArchExceptionHandler.c
|
||||
X64/ArchInterruptDefs.h
|
||||
|
||||
|
|
|
|||
|
|
@ -30,13 +30,11 @@
|
|||
[Sources.Ia32]
|
||||
Ia32/ExceptionHandlerAsm.nasm
|
||||
Ia32/ExceptionTssEntryAsm.nasm
|
||||
Ia32/ExceptionHandlerAsm.S
|
||||
Ia32/ArchExceptionHandler.c
|
||||
Ia32/ArchInterruptDefs.h
|
||||
|
||||
[Sources.X64]
|
||||
X64/ExceptionHandlerAsm.nasm
|
||||
X64/ExceptionHandlerAsm.S
|
||||
X64/ArchExceptionHandler.c
|
||||
X64/ArchInterruptDefs.h
|
||||
|
||||
|
|
|
|||
|
|
@ -1,434 +0,0 @@
|
|||
#------------------------------------------------------------------------------ ;
|
||||
# Copyright (c) 2012 - 2017, Intel Corporation. All rights reserved.<BR>
|
||||
# This program and the accompanying materials
|
||||
# are licensed and made available under the terms and conditions of the BSD License
|
||||
# which accompanies this distribution. The full text of the license may be found at
|
||||
# http://opensource.org/licenses/bsd-license.php.
|
||||
#
|
||||
# THE PROGRAM IS DISTRIBUTED UNDER THE BSD LICENSE ON AN "AS IS" BASIS,
|
||||
# WITHOUT WARRANTIES OR REPRESENTATIONS OF ANY KIND, EITHER EXPRESS OR IMPLIED.
|
||||
#
|
||||
# Module Name:
|
||||
#
|
||||
# ExceptionHandlerAsm.S
|
||||
#
|
||||
# Abstract:
|
||||
#
|
||||
# x64 CPU Exception Handler
|
||||
#
|
||||
# Notes:
|
||||
#
|
||||
#------------------------------------------------------------------------------
|
||||
|
||||
|
||||
|
||||
ASM_GLOBAL ASM_PFX(CommonExceptionHandler)
|
||||
|
||||
#EXTRN ASM_PFX(mErrorCodeFlag):DWORD # Error code flags for exceptions
|
||||
#EXTRN ASM_PFX(mDoFarReturnFlag):QWORD # Do far return flag
|
||||
.text
|
||||
|
||||
#ifdef __APPLE__
|
||||
# macros are different between GNU and Xcode as.
|
||||
.macro IDT_MACRO
|
||||
push $0
|
||||
#else
|
||||
.macro IDT_MACRO arg
|
||||
push \arg
|
||||
#endif
|
||||
.byte 0xe9 # jmp ASM_PFX(CommonInterruptEntry)
|
||||
.long ASM_PFX(CommonInterruptEntry) - . - 4
|
||||
.endm
|
||||
|
||||
AsmIdtVectorBegin:
|
||||
IDT_MACRO $0
|
||||
IDT_MACRO $1
|
||||
IDT_MACRO $2
|
||||
IDT_MACRO $3
|
||||
IDT_MACRO $4
|
||||
IDT_MACRO $5
|
||||
IDT_MACRO $6
|
||||
IDT_MACRO $7
|
||||
IDT_MACRO $8
|
||||
IDT_MACRO $9
|
||||
IDT_MACRO $10
|
||||
IDT_MACRO $11
|
||||
IDT_MACRO $12
|
||||
IDT_MACRO $13
|
||||
IDT_MACRO $14
|
||||
IDT_MACRO $15
|
||||
IDT_MACRO $16
|
||||
IDT_MACRO $17
|
||||
IDT_MACRO $18
|
||||
IDT_MACRO $19
|
||||
IDT_MACRO $20
|
||||
IDT_MACRO $21
|
||||
IDT_MACRO $22
|
||||
IDT_MACRO $23
|
||||
IDT_MACRO $24
|
||||
IDT_MACRO $25
|
||||
IDT_MACRO $26
|
||||
IDT_MACRO $27
|
||||
IDT_MACRO $28
|
||||
IDT_MACRO $29
|
||||
IDT_MACRO $30
|
||||
IDT_MACRO $31
|
||||
AsmIdtVectorEnd:
|
||||
|
||||
HookAfterStubHeaderBegin:
|
||||
.byte 0x6a # push
|
||||
PatchVectorNum:
|
||||
.byte 0 # 0 will be fixed
|
||||
.byte 0xe9 # jmp ASM_PFX(HookAfterStubHeaderEnd)
|
||||
PatchFuncAddress:
|
||||
.set HOOK_ADDRESS, ASM_PFX(HookAfterStubHeaderEnd) - . - 4
|
||||
.long HOOK_ADDRESS # will be fixed
|
||||
ASM_GLOBAL ASM_PFX(HookAfterStubHeaderEnd)
|
||||
ASM_PFX(HookAfterStubHeaderEnd):
|
||||
pushq %rax
|
||||
movq %rsp, %rax
|
||||
andl $0x0fffffff0, %esp # make sure 16-byte aligned for exception context
|
||||
subq $0x18, %rsp # reserve room for filling exception data later
|
||||
pushq %rcx
|
||||
movq 8(%rax), %rcx
|
||||
bt %ecx, ASM_PFX(mErrorCodeFlag)(%rip)
|
||||
jnc NoErrorData
|
||||
pushq (%rsp) # push additional rcx to make stack alignment
|
||||
NoErrorData:
|
||||
xchgq (%rsp), %rcx # restore rcx, save Exception Number in stack
|
||||
movq (%rax), %rax # restore rax
|
||||
|
||||
#---------------------------------------;
|
||||
# CommonInterruptEntry ;
|
||||
#---------------------------------------;
|
||||
# The follow algorithm is used for the common interrupt routine.
|
||||
|
||||
ASM_GLOBAL ASM_PFX(CommonInterruptEntry)
|
||||
ASM_PFX(CommonInterruptEntry):
|
||||
cli
|
||||
#
|
||||
# All interrupt handlers are invoked through interrupt gates, so
|
||||
# IF flag automatically cleared at the entry point
|
||||
#
|
||||
#
|
||||
# Calculate vector number
|
||||
#
|
||||
xchgq (%rsp), %rcx # get the return address of call, actually, it is the address of vector number.
|
||||
andq $0x0FF, %rcx
|
||||
cmp $32, %ecx # Intel reserved vector for exceptions?
|
||||
jae NoErrorCode
|
||||
pushq %rax
|
||||
movl ASM_PFX(mErrorCodeFlag)(%rip), %eax
|
||||
bt %ecx, %eax
|
||||
popq %rax
|
||||
jc CommonInterruptEntry_al_0000
|
||||
|
||||
NoErrorCode:
|
||||
|
||||
#
|
||||
# Push a dummy error code on the stack
|
||||
# to maintain coherent stack map
|
||||
#
|
||||
pushq (%rsp)
|
||||
movq $0, 8(%rsp)
|
||||
CommonInterruptEntry_al_0000:
|
||||
pushq %rbp
|
||||
movq %rsp, %rbp
|
||||
pushq $0 # check EXCEPTION_HANDLER_CONTEXT.OldIdtHandler
|
||||
pushq $0 # check EXCEPTION_HANDLER_CONTEXT.ExceptionDataFlag
|
||||
|
||||
#
|
||||
# Stack:
|
||||
# +---------------------+ <-- 16-byte aligned ensured by processor
|
||||
# + Old SS +
|
||||
# +---------------------+
|
||||
# + Old RSP +
|
||||
# +---------------------+
|
||||
# + RFlags +
|
||||
# +---------------------+
|
||||
# + CS +
|
||||
# +---------------------+
|
||||
# + RIP +
|
||||
# +---------------------+
|
||||
# + Error Code +
|
||||
# +---------------------+
|
||||
# + RCX / Vector Number +
|
||||
# +---------------------+
|
||||
# + RBP +
|
||||
# +---------------------+ <-- RBP, 16-byte aligned
|
||||
#
|
||||
|
||||
|
||||
#
|
||||
# Since here the stack pointer is 16-byte aligned, so
|
||||
# EFI_FX_SAVE_STATE_X64 of EFI_SYSTEM_CONTEXT_x64
|
||||
# is 16-byte aligned
|
||||
#
|
||||
|
||||
#; UINT64 Rdi, Rsi, Rbp, Rsp, Rbx, Rdx, Rcx, Rax;
|
||||
#; UINT64 R8, R9, R10, R11, R12, R13, R14, R15;
|
||||
pushq %r15
|
||||
pushq %r14
|
||||
pushq %r13
|
||||
pushq %r12
|
||||
pushq %r11
|
||||
pushq %r10
|
||||
pushq %r9
|
||||
pushq %r8
|
||||
pushq %rax
|
||||
pushq 8(%rbp) # RCX
|
||||
pushq %rdx
|
||||
pushq %rbx
|
||||
pushq 48(%rbp) # RSP
|
||||
pushq (%rbp) # RBP
|
||||
pushq %rsi
|
||||
pushq %rdi
|
||||
|
||||
#; UINT64 Gs, Fs, Es, Ds, Cs, Ss; insure high 16 bits of each is zero
|
||||
movzwq 56(%rbp), %rax
|
||||
pushq %rax # for ss
|
||||
movzwq 32(%rbp), %rax
|
||||
pushq %rax # for cs
|
||||
mov %ds, %rax
|
||||
pushq %rax
|
||||
mov %es, %rax
|
||||
pushq %rax
|
||||
mov %fs, %rax
|
||||
pushq %rax
|
||||
mov %gs, %rax
|
||||
pushq %rax
|
||||
|
||||
movq %rcx, 8(%rbp) # save vector number
|
||||
|
||||
#; UINT64 Rip;
|
||||
pushq 24(%rbp)
|
||||
|
||||
#; UINT64 Gdtr[2], Idtr[2];
|
||||
xorq %rax, %rax
|
||||
pushq %rax
|
||||
pushq %rax
|
||||
sidt (%rsp)
|
||||
xchgq 2(%rsp), %rax
|
||||
xchgq (%rsp), %rax
|
||||
xchgq 8(%rsp), %rax
|
||||
|
||||
xorq %rax, %rax
|
||||
pushq %rax
|
||||
pushq %rax
|
||||
sgdt (%rsp)
|
||||
xchgq 2(%rsp), %rax
|
||||
xchgq (%rsp), %rax
|
||||
xchgq 8(%rsp), %rax
|
||||
|
||||
#; UINT64 Ldtr, Tr;
|
||||
xorq %rax, %rax
|
||||
str %ax
|
||||
pushq %rax
|
||||
sldt %ax
|
||||
pushq %rax
|
||||
|
||||
#; UINT64 RFlags;
|
||||
pushq 40(%rbp)
|
||||
|
||||
#; UINT64 Cr0, Cr1, Cr2, Cr3, Cr4, Cr8;
|
||||
movq %cr8, %rax
|
||||
pushq %rax
|
||||
movq %cr4, %rax
|
||||
orq $0x208, %rax
|
||||
movq %rax, %cr4
|
||||
pushq %rax
|
||||
mov %cr3, %rax
|
||||
pushq %rax
|
||||
mov %cr2, %rax
|
||||
pushq %rax
|
||||
xorq %rax, %rax
|
||||
pushq %rax
|
||||
mov %cr0, %rax
|
||||
pushq %rax
|
||||
|
||||
#; UINT64 Dr0, Dr1, Dr2, Dr3, Dr6, Dr7;
|
||||
movq %dr7, %rax
|
||||
pushq %rax
|
||||
movq %dr6, %rax
|
||||
pushq %rax
|
||||
movq %dr3, %rax
|
||||
pushq %rax
|
||||
movq %dr2, %rax
|
||||
pushq %rax
|
||||
movq %dr1, %rax
|
||||
pushq %rax
|
||||
movq %dr0, %rax
|
||||
pushq %rax
|
||||
|
||||
#; FX_SAVE_STATE_X64 FxSaveState;
|
||||
subq $512, %rsp
|
||||
movq %rsp, %rdi
|
||||
.byte 0x0f, 0x0ae, 0x07 #fxsave [rdi]
|
||||
|
||||
#; UEFI calling convention for x64 requires that Direction flag in EFLAGs is clear
|
||||
cld
|
||||
|
||||
#; UINT32 ExceptionData;
|
||||
pushq 16(%rbp)
|
||||
|
||||
#; Prepare parameter and call
|
||||
mov 8(%rbp), %rcx
|
||||
mov %rsp, %rdx
|
||||
#
|
||||
# Per X64 calling convention, allocate maximum parameter stack space
|
||||
# and make sure RSP is 16-byte aligned
|
||||
#
|
||||
subq $40, %rsp
|
||||
call ASM_PFX(CommonExceptionHandler)
|
||||
addq $40, %rsp
|
||||
|
||||
cli
|
||||
#; UINT64 ExceptionData;
|
||||
addq $8, %rsp
|
||||
|
||||
#; FX_SAVE_STATE_X64 FxSaveState;
|
||||
|
||||
movq %rsp, %rsi
|
||||
.byte 0x0f, 0x0ae, 0x0E # fxrstor [rsi]
|
||||
addq $512, %rsp
|
||||
|
||||
#; UINT64 Dr0, Dr1, Dr2, Dr3, Dr6, Dr7;
|
||||
#; Skip restoration of DRx registers to support in-circuit emualators
|
||||
#; or debuggers set breakpoint in interrupt/exception context
|
||||
addq $48, %rsp
|
||||
|
||||
#; UINT64 Cr0, Cr1, Cr2, Cr3, Cr4, Cr8;
|
||||
popq %rax
|
||||
movq %rax, %cr0
|
||||
addq $8, %rsp # not for Cr1
|
||||
popq %rax
|
||||
movq %rax, %cr2
|
||||
popq %rax
|
||||
movq %rax, %cr3
|
||||
popq %rax
|
||||
movq %rax, %cr4
|
||||
popq %rax
|
||||
movq %rax, %cr8
|
||||
|
||||
#; UINT64 RFlags;
|
||||
popq 40(%rbp)
|
||||
|
||||
#; UINT64 Ldtr, Tr;
|
||||
#; UINT64 Gdtr[2], Idtr[2];
|
||||
#; Best not let anyone mess with these particular registers...
|
||||
addq $48, %rsp
|
||||
|
||||
#; UINT64 Rip;
|
||||
popq 24(%rbp)
|
||||
|
||||
#; UINT64 Gs, Fs, Es, Ds, Cs, Ss;
|
||||
popq %rax
|
||||
# mov %rax, %gs ; not for gs
|
||||
popq %rax
|
||||
# mov %rax, %fs ; not for fs
|
||||
# (X64 will not use fs and gs, so we do not restore it)
|
||||
popq %rax
|
||||
mov %rax, %es
|
||||
popq %rax
|
||||
mov %rax, %ds
|
||||
popq 32(%rbp) # for cs
|
||||
popq 56(%rbp) # for ss
|
||||
|
||||
#; UINT64 Rdi, Rsi, Rbp, Rsp, Rbx, Rdx, Rcx, Rax;
|
||||
#; UINT64 R8, R9, R10, R11, R12, R13, R14, R15;
|
||||
popq %rdi
|
||||
popq %rsi
|
||||
addq $8, %rsp # not for rbp
|
||||
popq 48(%rbp) # for rsp
|
||||
popq %rbx
|
||||
popq %rdx
|
||||
popq %rcx
|
||||
popq %rax
|
||||
popq %r8
|
||||
popq %r9
|
||||
popq %r10
|
||||
popq %r11
|
||||
popq %r12
|
||||
popq %r13
|
||||
popq %r14
|
||||
popq %r15
|
||||
|
||||
movq %rbp, %rsp
|
||||
popq %rbp
|
||||
addq $16, %rsp
|
||||
cmpq $0, -32(%rsp) # check EXCEPTION_HANDLER_CONTEXT.OldIdtHandler
|
||||
jz DoReturn # check EXCEPTION_HANDLER_CONTEXT.ExceptionDataFlag
|
||||
cmpb $1, -40(%rsp)
|
||||
jz ErrorCode
|
||||
jmp *-32(%rsp)
|
||||
ErrorCode:
|
||||
subq $8, %rsp
|
||||
jmp *-24(%rsp)
|
||||
|
||||
DoReturn:
|
||||
pushq %rax
|
||||
movq ASM_PFX(mDoFarReturnFlag)(%rip), %rax
|
||||
cmpq $0, %rax # Check if need to do far return instead of IRET
|
||||
popq %rax
|
||||
jz DoIret
|
||||
pushq %rax
|
||||
movq %rsp, %rax # save old RSP to rax
|
||||
movq 0x20(%rsp), %rsp
|
||||
pushq 0x10(%rax) # save CS in new location
|
||||
pushq 0x8(%rax) # save EIP in new location
|
||||
pushq 0x18(%rax) # save EFLAGS in new location
|
||||
movq (%rax), %rax # restore rax
|
||||
popfq # restore EFLAGS
|
||||
lretq # far return
|
||||
DoIret:
|
||||
iretq
|
||||
|
||||
|
||||
#-------------------------------------------------------------------------------------
|
||||
# AsmGetTemplateAddressMap (&AddressMap);
|
||||
#-------------------------------------------------------------------------------------
|
||||
# comments here for definition of address map
|
||||
ASM_GLOBAL ASM_PFX(AsmGetTemplateAddressMap)
|
||||
ASM_PFX(AsmGetTemplateAddressMap):
|
||||
pushq %rbp
|
||||
movq %rsp, %rbp
|
||||
|
||||
leaq AsmIdtVectorBegin(%rip), %rax
|
||||
movq %rax, (%rcx)
|
||||
.set ENTRY_SIZE, ASM_PFX(HookAfterStubHeaderEnd) - HookAfterStubHeaderBegin
|
||||
movq $(ENTRY_SIZE), 0x08(%rcx)
|
||||
leaq HookAfterStubHeaderBegin(%rip), %rax
|
||||
movq %rax, 0x10(%rcx)
|
||||
|
||||
popq %rbp
|
||||
ret
|
||||
|
||||
#-------------------------------------------------------------------------------------
|
||||
# VOID
|
||||
# EFIAPI
|
||||
# AsmVectorNumFixup (
|
||||
# IN VOID *NewVectorAddr, // RCX
|
||||
# IN UINT8 VectorNum // RDX
|
||||
# IN VOID *OldVectorAddr, // R8
|
||||
# );
|
||||
#-------------------------------------------------------------------------------------
|
||||
ASM_GLOBAL ASM_PFX(AsmVectorNumFixup)
|
||||
ASM_PFX(AsmVectorNumFixup):
|
||||
pushq %rbp
|
||||
movq %rsp, %rbp
|
||||
|
||||
# Patch vector #
|
||||
movb %dl, (PatchVectorNum - HookAfterStubHeaderBegin)(%rcx)
|
||||
|
||||
# Patch Function address
|
||||
subq %rcx, %r8 # Calculate the offset value
|
||||
movl (PatchFuncAddress - HookAfterStubHeaderBegin)(%rcx), %eax
|
||||
addq %r8, %rax
|
||||
movl %eax, (PatchFuncAddress - HookAfterStubHeaderBegin)(%rcx)
|
||||
|
||||
popq %rbp
|
||||
ret
|
||||
|
||||
#END
|
||||
|
||||
|
||||
Loading…
Reference in New Issue