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OvmfPkg/PlatformPei: factor out Q35BoardVerification() 

Before adding another SMM-related, and therefore Q35-only, dynamically
detectable feature, extract the current board type check from
Q35TsegMbytesInitialization() to a standalone function.

Cc: Ard Biesheuvel <ard.biesheuvel@linaro.org>
Cc: Jordan Justen <jordan.l.justen@intel.com>
Ref: https://bugzilla.tianocore.org/show_bug.cgi?id=1512
Signed-off-by: Laszlo Ersek <lersek@redhat.com>
Reviewed-by: Jiewen Yao <jiewen.yao@intel.com>
Message-Id: <20200129214412.2361-5-lersek@redhat.com>
Reviewed-by: Ard Biesheuvel <ard.biesheuvel@linaro.org>
This commit is contained in:
Laszlo Ersek 2019-09-20 13:36:56 +02:00 committed by mergify[bot]
parent 04ff9d663b
commit e0ed7a9b15
2 changed files with 24 additions and 12 deletions
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13
OvmfPkg/PlatformPei/MemDetect.c
View File

@ -53,18 +53,7 @@ Q35TsegMbytesInitialization (
UINT16 ExtendedTsegMbytes;
RETURN_STATUS PcdStatus;
if (mHostBridgeDevId != INTEL_Q35_MCH_DEVICE_ID) {
DEBUG ((
DEBUG_ERROR,
"%a: no TSEG (SMRAM) on host bridge DID=0x%04x; "
"only DID=0x%04x (Q35) is supported\n",
__FUNCTION__,
mHostBridgeDevId,
INTEL_Q35_MCH_DEVICE_ID
));
ASSERT (FALSE);
CpuDeadLoop ();
}
ASSERT (mHostBridgeDevId == INTEL_Q35_MCH_DEVICE_ID);
//
// Check if QEMU offers an extended TSEG.

23
OvmfPkg/PlatformPei/Platform.c
View File

@ -566,6 +566,28 @@ S3Verification (
}
VOID
Q35BoardVerification (
VOID
)
{
if (mHostBridgeDevId == INTEL_Q35_MCH_DEVICE_ID) {
return;
}
DEBUG ((
DEBUG_ERROR,
"%a: no TSEG (SMRAM) on host bridge DID=0x%04x; "
"only DID=0x%04x (Q35) is supported\n",
__FUNCTION__,
mHostBridgeDevId,
INTEL_Q35_MCH_DEVICE_ID
));
ASSERT (FALSE);
CpuDeadLoop ();
}
/**
Fetch the boot CPU count and the possible CPU count from QEMU, and expose
them to UefiCpuPkg modules. Set the mMaxCpuCount variable.
@ -768,6 +790,7 @@ InitializePlatform (
MaxCpuCountInitialization ();
if (FeaturePcdGet (PcdSmmSmramRequire)) {
Q35BoardVerification ();
Q35TsegMbytesInitialization ();
}