OvmfPkg/PlatformPei: Refactor MiscInitialization

BZ: https://bugzilla.tianocore.org/show_bug.cgi?id=3863

MiscInitialization is split into 2 functions:
 - PlatformMiscInitialization is for PlatformInitLib.
 - MiscInitialization calls PlatformMiscInitialization and then sets
   PCD. It is for PlatformPei.

Cc: Ard Biesheuvel <ardb+tianocore@kernel.org>
Cc: Jordan Justen <jordan.l.justen@intel.com>
Cc: Brijesh Singh <brijesh.singh@amd.com>
Cc: Erdem Aktas <erdemaktas@google.com>
Cc: James Bottomley <jejb@linux.ibm.com>
Cc: Jiewen Yao <jiewen.yao@intel.com>
Cc: Tom Lendacky <thomas.lendacky@amd.com>
Cc: Gerd Hoffmann <kraxel@redhat.com>
Cc: Sebastien Boeuf <sebastien.boeuf@intel.com>
Acked-by: Gerd Hoffmann <kraxel@redhat.com>
Reviewed-by: Jiewen Yao <jiewen.yao@intel.com>
Signed-off-by: Min Xu <min.m.xu@intel.com>
This commit is contained in:
Min Xu 2022-03-06 22:35:23 +08:00 committed by mergify[bot]
parent cec82a64cf
commit f53f449f15
1 changed files with 26 additions and 17 deletions

View File

@ -57,12 +57,12 @@ PlatformMemMapInitialization (
IN OUT EFI_HOB_PLATFORM_INFO *PlatformInfoHob IN OUT EFI_HOB_PLATFORM_INFO *PlatformInfoHob
) )
{ {
UINT64 PciIoBase; UINT64 PciIoBase;
UINT64 PciIoSize; UINT64 PciIoSize;
UINT32 TopOfLowRam; UINT32 TopOfLowRam;
UINT64 PciExBarBase; UINT64 PciExBarBase;
UINT32 PciBase; UINT32 PciBase;
UINT32 PciSize; UINT32 PciSize;
PciIoBase = 0xC000; PciIoBase = 0xC000;
PciIoSize = 0x4000; PciIoSize = 0x4000;
@ -360,17 +360,16 @@ MiscInitializationForMicrovm (
} }
VOID VOID
MiscInitialization ( PlatformMiscInitialization (
IN EFI_HOB_PLATFORM_INFO *PlatformInfoHob IN EFI_HOB_PLATFORM_INFO *PlatformInfoHob
) )
{ {
UINTN PmCmd; UINTN PmCmd;
UINTN Pmba; UINTN Pmba;
UINT32 PmbaAndVal; UINT32 PmbaAndVal;
UINT32 PmbaOrVal; UINT32 PmbaOrVal;
UINTN AcpiCtlReg; UINTN AcpiCtlReg;
UINT8 AcpiEnBit; UINT8 AcpiEnBit;
RETURN_STATUS PcdStatus;
// //
// Disable A20 Mask // Disable A20 Mask
@ -417,9 +416,6 @@ MiscInitialization (
return; return;
} }
PcdStatus = PcdSet16S (PcdOvmfHostBridgePciDevId, PlatformInfoHob->HostBridgeDevId);
ASSERT_RETURN_ERROR (PcdStatus);
if (PlatformInfoHob->HostBridgeDevId == CLOUDHV_DEVICE_ID) { if (PlatformInfoHob->HostBridgeDevId == CLOUDHV_DEVICE_ID) {
DEBUG ((DEBUG_INFO, "%a: Cloud Hypervisor is done.\n", __FUNCTION__)); DEBUG ((DEBUG_INFO, "%a: Cloud Hypervisor is done.\n", __FUNCTION__));
return; return;
@ -464,6 +460,19 @@ MiscInitialization (
} }
} }
VOID
MiscInitialization (
IN EFI_HOB_PLATFORM_INFO *PlatformInfoHob
)
{
RETURN_STATUS PcdStatus;
PlatformMiscInitialization (PlatformInfoHob);
PcdStatus = PcdSet16S (PcdOvmfHostBridgePciDevId, PlatformInfoHob->HostBridgeDevId);
ASSERT_RETURN_ERROR (PcdStatus);
}
VOID VOID
BootModeInitialization ( BootModeInitialization (
IN OUT EFI_HOB_PLATFORM_INFO *PlatformInfoHob IN OUT EFI_HOB_PLATFORM_INFO *PlatformInfoHob