mirror of https://github.com/acidanthera/audk.git
ArmPlatformPkg: Code cleaning
- Fix coding style to follow EDK2 coding convention - Remove deprecated function - Remove unused PCDs git-svn-id: https://edk2.svn.sourceforge.net/svnroot/edk2/trunk/edk2@11808 6f19259b-4bc3-4df7-8a09-765794883524
This commit is contained in:
parent
d6b5f236ae
commit
f598bf1266
|
@ -42,5 +42,3 @@
|
||||||
gArmPlatformTokenSpaceGuid.PcdStandalone
|
gArmPlatformTokenSpaceGuid.PcdStandalone
|
||||||
|
|
||||||
[FixedPcd]
|
[FixedPcd]
|
||||||
gArmTokenSpaceGuid.PcdNormalFdBaseAddress
|
|
||||||
gArmTokenSpaceGuid.PcdNormalFdSize
|
|
||||||
|
|
|
@ -18,6 +18,8 @@
|
||||||
#include <Library/MemoryAllocationLib.h>
|
#include <Library/MemoryAllocationLib.h>
|
||||||
#include <Library/IoLib.h>
|
#include <Library/IoLib.h>
|
||||||
|
|
||||||
|
#define MAX_VIRTUAL_MEMORY_MAP_DESCRIPTORS 6
|
||||||
|
|
||||||
// DDR attributes
|
// DDR attributes
|
||||||
#define DDR_ATTRIBUTES_CACHED ARM_MEMORY_REGION_ATTRIBUTE_WRITE_BACK
|
#define DDR_ATTRIBUTES_CACHED ARM_MEMORY_REGION_ATTRIBUTE_WRITE_BACK
|
||||||
#define DDR_ATTRIBUTES_UNCACHED ARM_MEMORY_REGION_ATTRIBUTE_UNCACHED_UNBUFFERED
|
#define DDR_ATTRIBUTES_UNCACHED ARM_MEMORY_REGION_ATTRIBUTE_UNCACHED_UNBUFFERED
|
||||||
|
@ -34,7 +36,11 @@
|
||||||
entry
|
entry
|
||||||
|
|
||||||
**/
|
**/
|
||||||
VOID ArmPlatformGetVirtualMemoryMap(ARM_MEMORY_REGION_DESCRIPTOR** VirtualMemoryMap) {
|
VOID
|
||||||
|
ArmPlatformGetVirtualMemoryMap (
|
||||||
|
IN ARM_MEMORY_REGION_DESCRIPTOR** VirtualMemoryMap
|
||||||
|
)
|
||||||
|
{
|
||||||
UINT32 CacheAttributes;
|
UINT32 CacheAttributes;
|
||||||
BOOLEAN bTrustzoneSupport = FALSE;
|
BOOLEAN bTrustzoneSupport = FALSE;
|
||||||
UINTN Index = 0;
|
UINTN Index = 0;
|
||||||
|
@ -42,7 +48,7 @@ VOID ArmPlatformGetVirtualMemoryMap(ARM_MEMORY_REGION_DESCRIPTOR** VirtualMemory
|
||||||
|
|
||||||
ASSERT(VirtualMemoryMap != NULL);
|
ASSERT(VirtualMemoryMap != NULL);
|
||||||
|
|
||||||
VirtualMemoryTable = (ARM_MEMORY_REGION_DESCRIPTOR*)AllocatePages(sizeof(ARM_MEMORY_REGION_DESCRIPTOR) * 9);
|
VirtualMemoryTable = (ARM_MEMORY_REGION_DESCRIPTOR*)AllocatePages(EFI_SIZE_TO_PAGES (sizeof(ARM_MEMORY_REGION_DESCRIPTOR) * MAX_VIRTUAL_MEMORY_MAP_DESCRIPTORS));
|
||||||
if (VirtualMemoryTable == NULL) {
|
if (VirtualMemoryTable == NULL) {
|
||||||
return;
|
return;
|
||||||
}
|
}
|
||||||
|
@ -95,6 +101,10 @@ VOID ArmPlatformGetVirtualMemoryMap(ARM_MEMORY_REGION_DESCRIPTOR** VirtualMemory
|
||||||
VirtualMemoryTable[Index].VirtualBase = ARM_EB_LOGIC_TILE_BASE;
|
VirtualMemoryTable[Index].VirtualBase = ARM_EB_LOGIC_TILE_BASE;
|
||||||
VirtualMemoryTable[Index].Length = ARM_EB_LOGIC_TILE_SZ;
|
VirtualMemoryTable[Index].Length = ARM_EB_LOGIC_TILE_SZ;
|
||||||
VirtualMemoryTable[Index].Attributes = (bTrustzoneSupport ? ARM_MEMORY_REGION_ATTRIBUTE_DEVICE : ARM_MEMORY_REGION_ATTRIBUTE_SECURE_DEVICE);
|
VirtualMemoryTable[Index].Attributes = (bTrustzoneSupport ? ARM_MEMORY_REGION_ATTRIBUTE_DEVICE : ARM_MEMORY_REGION_ATTRIBUTE_SECURE_DEVICE);
|
||||||
|
|
||||||
|
ASSERT((Index + 1) == (MAX_VIRTUAL_MEMORY_MAP_DESCRIPTORS + 1));
|
||||||
|
} else {
|
||||||
|
ASSERT((Index + 1) == MAX_VIRTUAL_MEMORY_MAP_DESCRIPTORS);
|
||||||
}
|
}
|
||||||
|
|
||||||
// End of Table
|
// End of Table
|
||||||
|
@ -119,6 +129,7 @@ VOID ArmPlatformGetVirtualMemoryMap(ARM_MEMORY_REGION_DESCRIPTOR** VirtualMemory
|
||||||
EFI_STATUS
|
EFI_STATUS
|
||||||
ArmPlatformGetAdditionalSystemMemory (
|
ArmPlatformGetAdditionalSystemMemory (
|
||||||
OUT ARM_SYSTEM_MEMORY_REGION_DESCRIPTOR** EfiMemoryMap
|
OUT ARM_SYSTEM_MEMORY_REGION_DESCRIPTOR** EfiMemoryMap
|
||||||
) {
|
)
|
||||||
|
{
|
||||||
return EFI_UNSUPPORTED;
|
return EFI_UNSUPPORTED;
|
||||||
}
|
}
|
||||||
|
|
|
@ -42,5 +42,3 @@
|
||||||
gArmPlatformTokenSpaceGuid.PcdStandalone
|
gArmPlatformTokenSpaceGuid.PcdStandalone
|
||||||
|
|
||||||
[FixedPcd]
|
[FixedPcd]
|
||||||
gArmTokenSpaceGuid.PcdNormalFdBaseAddress
|
|
||||||
gArmTokenSpaceGuid.PcdNormalFdSize
|
|
||||||
|
|
|
@ -47,7 +47,4 @@
|
||||||
gArmPlatformTokenSpaceGuid.PcdNorFlashRemapping
|
gArmPlatformTokenSpaceGuid.PcdNorFlashRemapping
|
||||||
|
|
||||||
[FixedPcd]
|
[FixedPcd]
|
||||||
gArmTokenSpaceGuid.PcdNormalFdBaseAddress
|
|
||||||
gArmTokenSpaceGuid.PcdNormalFdSize
|
|
||||||
|
|
||||||
gArmTokenSpaceGuid.PcdL2x0ControllerBase
|
gArmTokenSpaceGuid.PcdL2x0ControllerBase
|
||||||
|
|
|
@ -48,7 +48,4 @@
|
||||||
gArmPlatformTokenSpaceGuid.PcdNorFlashRemapping
|
gArmPlatformTokenSpaceGuid.PcdNorFlashRemapping
|
||||||
|
|
||||||
[FixedPcd]
|
[FixedPcd]
|
||||||
gArmTokenSpaceGuid.PcdNormalFdBaseAddress
|
|
||||||
gArmTokenSpaceGuid.PcdNormalFdSize
|
|
||||||
|
|
||||||
gArmTokenSpaceGuid.PcdL2x0ControllerBase
|
gArmTokenSpaceGuid.PcdL2x0ControllerBase
|
||||||
|
|
|
@ -158,21 +158,6 @@ ArmPlatformTrustzoneInit (
|
||||||
VOID
|
VOID
|
||||||
);
|
);
|
||||||
|
|
||||||
/**
|
|
||||||
Return the information about the memory region in permanent memory used by PEI
|
|
||||||
|
|
||||||
One of the PEI Module must install the permament memory used by PEI. This function returns the
|
|
||||||
information about this region for your platform to this PEIM module.
|
|
||||||
|
|
||||||
@param[out] PeiMemoryBase Base of the memory region used by PEI core and modules
|
|
||||||
@param[out] PeiMemorySize Size of the memory region used by PEI core and modules
|
|
||||||
|
|
||||||
**/
|
|
||||||
VOID ArmPlatformGetPeiMemory (
|
|
||||||
OUT UINTN* PeiMemoryBase,
|
|
||||||
OUT UINTN* PeiMemorySize
|
|
||||||
);
|
|
||||||
|
|
||||||
/**
|
/**
|
||||||
Return the Virtual Memory Map of your platform
|
Return the Virtual Memory Map of your platform
|
||||||
|
|
||||||
|
|
|
@ -16,6 +16,7 @@
|
||||||
// The package level header files this module uses
|
// The package level header files this module uses
|
||||||
//
|
//
|
||||||
#include <PiPei.h>
|
#include <PiPei.h>
|
||||||
|
|
||||||
//
|
//
|
||||||
// The protocols, PPI and GUID defintions for this module
|
// The protocols, PPI and GUID defintions for this module
|
||||||
//
|
//
|
||||||
|
@ -35,10 +36,6 @@
|
||||||
#include <Library/MemoryAllocationLib.h>
|
#include <Library/MemoryAllocationLib.h>
|
||||||
#include <Library/ArmPlatformLib.h>
|
#include <Library/ArmPlatformLib.h>
|
||||||
|
|
||||||
//
|
|
||||||
// Module globals
|
|
||||||
//
|
|
||||||
|
|
||||||
VOID
|
VOID
|
||||||
InitMmu (
|
InitMmu (
|
||||||
VOID
|
VOID
|
||||||
|
@ -56,7 +53,7 @@ InitMmu (
|
||||||
ArmConfigureMmu (MemoryTable, &TranslationTableBase, &TranslationTableSize);
|
ArmConfigureMmu (MemoryTable, &TranslationTableBase, &TranslationTableSize);
|
||||||
}
|
}
|
||||||
|
|
||||||
// May want to put this into a library so you only need the PCD setings if you are using the feature?
|
// May want to put this into a library so you only need the PCD settings if you are using the feature?
|
||||||
VOID
|
VOID
|
||||||
BuildMemoryTypeInformationHob (
|
BuildMemoryTypeInformationHob (
|
||||||
VOID
|
VOID
|
||||||
|
@ -87,10 +84,8 @@ BuildMemoryTypeInformationHob (
|
||||||
Info[9].Type = EfiMaxMemoryType;
|
Info[9].Type = EfiMaxMemoryType;
|
||||||
Info[9].NumberOfPages = 0;
|
Info[9].NumberOfPages = 0;
|
||||||
|
|
||||||
|
|
||||||
BuildGuidDataHob (&gEfiMemoryTypeInformationGuid, &Info, sizeof (Info));
|
BuildGuidDataHob (&gEfiMemoryTypeInformationGuid, &Info, sizeof (Info));
|
||||||
}
|
}
|
||||||
|
|
||||||
/*++
|
/*++
|
||||||
|
|
||||||
Routine Description:
|
Routine Description:
|
||||||
|
|
|
@ -1,6 +1,6 @@
|
||||||
#/** @file
|
#/** @file
|
||||||
#
|
#
|
||||||
# Copyright (c) 2010, ARM Ltd. All rights reserved.<BR>
|
# Copyright (c) 2011, ARM Ltd. All rights reserved.<BR>
|
||||||
# This program and the accompanying materials
|
# This program and the accompanying materials
|
||||||
# are licensed and made available under the terms and conditions of the BSD License
|
# are licensed and made available under the terms and conditions of the BSD License
|
||||||
# which accompanies this distribution. The full text of the license may be found at
|
# which accompanies this distribution. The full text of the license may be found at
|
||||||
|
|
|
@ -12,13 +12,14 @@
|
||||||
*
|
*
|
||||||
**/
|
**/
|
||||||
|
|
||||||
#include <PiPei.h>
|
|
||||||
#include <Library/DebugLib.h>
|
#include <Library/DebugLib.h>
|
||||||
#include <Library/PcdLib.h>
|
#include <Library/PcdLib.h>
|
||||||
#include <Library/ArmMPCoreMailBoxLib.h>
|
#include <Library/ArmMPCoreMailBoxLib.h>
|
||||||
#include <Chipset/ArmV7.h>
|
#include <Chipset/ArmV7.h>
|
||||||
#include <Drivers/PL390Gic.h>
|
#include <Drivers/PL390Gic.h>
|
||||||
|
|
||||||
|
#include "PrePeiCore.h"
|
||||||
|
|
||||||
extern EFI_PEI_PPI_DESCRIPTOR *gSecPpiTable;
|
extern EFI_PEI_PPI_DESCRIPTOR *gSecPpiTable;
|
||||||
|
|
||||||
/*
|
/*
|
||||||
|
@ -32,31 +33,35 @@ extern EFI_PEI_PPI_DESCRIPTOR *gSecPpiTable;
|
||||||
*/
|
*/
|
||||||
VOID
|
VOID
|
||||||
EFIAPI
|
EFIAPI
|
||||||
secondary_main(IN UINTN CoreId)
|
SecondaryMain (
|
||||||
|
IN UINTN CoreId
|
||||||
|
)
|
||||||
{
|
{
|
||||||
//Function pointer to Secondary Core entry point
|
// Function pointer to Secondary Core entry point
|
||||||
VOID (*secondary_start)(VOID);
|
VOID (*secondary_start)(VOID);
|
||||||
UINTN secondary_entry_addr=0;
|
UINTN secondary_entry_addr=0;
|
||||||
|
|
||||||
//Clear Secondary cores MailBox
|
// Clear Secondary cores MailBox
|
||||||
ArmClearMPCoreMailbox();
|
ArmClearMPCoreMailbox();
|
||||||
|
|
||||||
while (secondary_entry_addr = ArmGetMPCoreMailbox(), secondary_entry_addr == 0) {
|
while (secondary_entry_addr = ArmGetMPCoreMailbox(), secondary_entry_addr == 0) {
|
||||||
ArmCallWFI();
|
ArmCallWFI();
|
||||||
//Acknowledge the interrupt and send End of Interrupt signal.
|
// Acknowledge the interrupt and send End of Interrupt signal.
|
||||||
PL390GicAcknowledgeSgiFrom(PcdGet32(PcdGicInterruptInterfaceBase),0/*CoreId*/);
|
PL390GicAcknowledgeSgiFrom(PcdGet32(PcdGicInterruptInterfaceBase),0/*CoreId*/);
|
||||||
}
|
}
|
||||||
|
|
||||||
secondary_start = (VOID (*)())secondary_entry_addr;
|
secondary_start = (VOID (*)())secondary_entry_addr;
|
||||||
|
|
||||||
//Jump to secondary core entry point.
|
// Jump to secondary core entry point.
|
||||||
secondary_start();
|
secondary_start();
|
||||||
|
|
||||||
//the secondaries shouldn't reach here
|
// The secondaries shouldn't reach here
|
||||||
ASSERT(FALSE);
|
ASSERT(FALSE);
|
||||||
}
|
}
|
||||||
|
|
||||||
VOID primary_main (
|
VOID
|
||||||
|
EFIAPI
|
||||||
|
PrimaryMain (
|
||||||
IN EFI_PEI_CORE_ENTRY_POINT PeiCoreEntryPoint
|
IN EFI_PEI_CORE_ENTRY_POINT PeiCoreEntryPoint
|
||||||
)
|
)
|
||||||
{
|
{
|
||||||
|
@ -86,6 +91,6 @@ VOID primary_main (
|
||||||
SecCoreData.StackBase = SecCoreData.TemporaryRamBase;
|
SecCoreData.StackBase = SecCoreData.TemporaryRamBase;
|
||||||
SecCoreData.StackSize = SecCoreData.TemporaryRamSize - SecCoreData.PeiTemporaryRamSize;
|
SecCoreData.StackSize = SecCoreData.TemporaryRamSize - SecCoreData.PeiTemporaryRamSize;
|
||||||
|
|
||||||
// jump to pei core entry point
|
// Jump to PEI core entry point
|
||||||
(PeiCoreEntryPoint)(&SecCoreData, (VOID *)&gSecPpiTable);
|
(PeiCoreEntryPoint)(&SecCoreData, (VOID *)&gSecPpiTable);
|
||||||
}
|
}
|
||||||
|
|
|
@ -12,21 +12,26 @@
|
||||||
*
|
*
|
||||||
**/
|
**/
|
||||||
|
|
||||||
#include <PiPei.h>
|
|
||||||
#include <Library/DebugLib.h>
|
#include <Library/DebugLib.h>
|
||||||
#include <Library/PcdLib.h>
|
#include <Library/PcdLib.h>
|
||||||
#include <Chipset/ArmV7.h>
|
#include <Chipset/ArmV7.h>
|
||||||
|
|
||||||
|
#include "PrePeiCore.h"
|
||||||
|
|
||||||
extern EFI_PEI_PPI_DESCRIPTOR *gSecPpiTable;
|
extern EFI_PEI_PPI_DESCRIPTOR *gSecPpiTable;
|
||||||
|
|
||||||
VOID
|
VOID
|
||||||
EFIAPI
|
EFIAPI
|
||||||
secondary_main(IN UINTN CoreId)
|
SecondaryMain (
|
||||||
|
IN UINTN CoreId
|
||||||
|
)
|
||||||
{
|
{
|
||||||
ASSERT(FALSE);
|
ASSERT(FALSE);
|
||||||
}
|
}
|
||||||
|
|
||||||
VOID primary_main (
|
VOID
|
||||||
|
EFIAPI
|
||||||
|
PrimaryMain (
|
||||||
IN EFI_PEI_CORE_ENTRY_POINT PeiCoreEntryPoint
|
IN EFI_PEI_CORE_ENTRY_POINT PeiCoreEntryPoint
|
||||||
)
|
)
|
||||||
{
|
{
|
||||||
|
|
|
@ -13,29 +13,17 @@
|
||||||
*
|
*
|
||||||
**/
|
**/
|
||||||
|
|
||||||
#include <PiPei.h>
|
|
||||||
#include <Ppi/TemporaryRamSupport.h>
|
|
||||||
#include <Library/DebugLib.h>
|
#include <Library/DebugLib.h>
|
||||||
#include <Library/PcdLib.h>
|
#include <Library/PcdLib.h>
|
||||||
#include <Library/IoLib.h>
|
#include <Library/IoLib.h>
|
||||||
#include <Library/BaseLib.h>
|
#include <Library/BaseLib.h>
|
||||||
#include <Library/BaseMemoryLib.h>
|
#include <Library/BaseMemoryLib.h>
|
||||||
|
#include <Library/PrintLib.h>
|
||||||
#include <Library/ArmLib.h>
|
#include <Library/ArmLib.h>
|
||||||
|
#include <Library/SerialPortLib.h>
|
||||||
#include <Chipset/ArmV7.h>
|
#include <Chipset/ArmV7.h>
|
||||||
|
|
||||||
EFI_STATUS
|
#include "PrePeiCore.h"
|
||||||
EFIAPI
|
|
||||||
SecTemporaryRamSupport (
|
|
||||||
IN CONST EFI_PEI_SERVICES **PeiServices,
|
|
||||||
IN EFI_PHYSICAL_ADDRESS TemporaryMemoryBase,
|
|
||||||
IN EFI_PHYSICAL_ADDRESS PermanentMemoryBase,
|
|
||||||
IN UINTN CopySize
|
|
||||||
);
|
|
||||||
|
|
||||||
VOID
|
|
||||||
SecSwitchStack (
|
|
||||||
INTN StackDelta
|
|
||||||
);
|
|
||||||
|
|
||||||
EFI_PEI_TEMPORARY_RAM_SUPPORT_PPI mSecTemporaryRamSupportPpi = {SecTemporaryRamSupport};
|
EFI_PEI_TEMPORARY_RAM_SUPPORT_PPI mSecTemporaryRamSupportPpi = {SecTemporaryRamSupport};
|
||||||
|
|
||||||
|
@ -47,10 +35,6 @@ EFI_PEI_PPI_DESCRIPTOR gSecPpiTable[] = {
|
||||||
}
|
}
|
||||||
};
|
};
|
||||||
|
|
||||||
// Vector Table for Pei Phase
|
|
||||||
VOID PeiVectorTable (VOID);
|
|
||||||
|
|
||||||
|
|
||||||
VOID
|
VOID
|
||||||
CEntryPoint (
|
CEntryPoint (
|
||||||
IN UINTN CoreId,
|
IN UINTN CoreId,
|
||||||
|
@ -64,8 +48,8 @@ CEntryPoint (
|
||||||
ArmInvalidateInstructionCache();
|
ArmInvalidateInstructionCache();
|
||||||
|
|
||||||
// Enable Instruction & Data caches
|
// Enable Instruction & Data caches
|
||||||
ArmEnableDataCache();
|
ArmEnableDataCache ();
|
||||||
ArmEnableInstructionCache();
|
ArmEnableInstructionCache ();
|
||||||
|
|
||||||
//
|
//
|
||||||
// Note: Doesn't have to Enable CPU interface in non-secure world,
|
// Note: Doesn't have to Enable CPU interface in non-secure world,
|
||||||
|
@ -81,9 +65,9 @@ CEntryPoint (
|
||||||
//If not primary Jump to Secondary Main
|
//If not primary Jump to Secondary Main
|
||||||
if(0 == CoreId) {
|
if(0 == CoreId) {
|
||||||
//Goto primary Main.
|
//Goto primary Main.
|
||||||
primary_main(PeiCoreEntryPoint);
|
PrimaryMain (PeiCoreEntryPoint);
|
||||||
} else {
|
} else {
|
||||||
secondary_main(CoreId);
|
SecondaryMain (CoreId);
|
||||||
}
|
}
|
||||||
|
|
||||||
// PEI Core should always load and never return
|
// PEI Core should always load and never return
|
||||||
|
|
|
@ -0,0 +1,60 @@
|
||||||
|
/** @file
|
||||||
|
* Main file supporting the transition to PEI Core in Normal World for Versatile Express
|
||||||
|
*
|
||||||
|
* Copyright (c) 2011, ARM Limited. All rights reserved.
|
||||||
|
*
|
||||||
|
* This program and the accompanying materials
|
||||||
|
* are licensed and made available under the terms and conditions of the BSD License
|
||||||
|
* which accompanies this distribution. The full text of the license may be found at
|
||||||
|
* http://opensource.org/licenses/bsd-license.php
|
||||||
|
*
|
||||||
|
* THE PROGRAM IS DISTRIBUTED UNDER THE BSD LICENSE ON AN "AS IS" BASIS,
|
||||||
|
* WITHOUT WARRANTIES OR REPRESENTATIONS OF ANY KIND, EITHER EXPRESS OR IMPLIED.
|
||||||
|
*
|
||||||
|
**/
|
||||||
|
#ifndef __PREPEICORE_H_
|
||||||
|
#define __PREPEICORE_H_
|
||||||
|
|
||||||
|
#include <PiPei.h>
|
||||||
|
#include <Ppi/TemporaryRamSupport.h>
|
||||||
|
|
||||||
|
|
||||||
|
EFI_STATUS
|
||||||
|
EFIAPI
|
||||||
|
SecTemporaryRamSupport (
|
||||||
|
IN CONST EFI_PEI_SERVICES **PeiServices,
|
||||||
|
IN EFI_PHYSICAL_ADDRESS TemporaryMemoryBase,
|
||||||
|
IN EFI_PHYSICAL_ADDRESS PermanentMemoryBase,
|
||||||
|
IN UINTN CopySize
|
||||||
|
);
|
||||||
|
|
||||||
|
VOID
|
||||||
|
SecSwitchStack (
|
||||||
|
INTN StackDelta
|
||||||
|
);
|
||||||
|
|
||||||
|
// Vector Table for Pei Phase
|
||||||
|
VOID PeiVectorTable (VOID);
|
||||||
|
|
||||||
|
VOID
|
||||||
|
EFIAPI
|
||||||
|
PrimaryMain (
|
||||||
|
IN EFI_PEI_CORE_ENTRY_POINT PeiCoreEntryPoint
|
||||||
|
);
|
||||||
|
|
||||||
|
/*
|
||||||
|
* This is the main function for secondary cores. They loop around until a non Null value is written to
|
||||||
|
* SYS_FLAGS register.The SYS_FLAGS register is platform specific.
|
||||||
|
* Note:The secondary cores, while executing secondary_main, assumes that:
|
||||||
|
* : SGI 0 is configured as Non-secure interrupt
|
||||||
|
* : Priority Mask is configured to allow SGI 0
|
||||||
|
* : Interrupt Distributor and CPU interfaces are enabled
|
||||||
|
*
|
||||||
|
*/
|
||||||
|
VOID
|
||||||
|
EFIAPI
|
||||||
|
SecondaryMain (
|
||||||
|
IN UINTN CoreId
|
||||||
|
);
|
||||||
|
|
||||||
|
#endif
|
Loading…
Reference in New Issue