Commit Graph

20621 Commits

Author SHA1 Message Date
Eric Dong 01dd077315 SecurityPkg OpalPasswordDxe: Clean PSID buffer.
Change callback handler type to avoid saving PSID info in
browser temp buffer. Also clean the buffer after using it.

Cc: Feng Tian <feng.tian@intel.com>
Reviewed-by: Jiewen Yao <jiewen.yao@intel.com>
Contributed-under: TianoCore Contribution Agreement 1.0
Signed-off-by: Eric Dong <eric.dong@intel.com>
2016-11-21 15:37:57 +08:00
Eric Dong bee13c0021 SecurityPkg OpalPasswordDxe: Clean password buffer.
Cc: Feng Tian <feng.tian@intel.com>
Reviewed-by: Jiewen Yao <jiewen.yao@intel.com>
Contributed-under: TianoCore Contribution Agreement 1.0
Signed-off-by: Eric Dong <eric.dong@intel.com>
2016-11-21 15:37:57 +08:00
Eric Dong bda034c34d SecurityPkg Tcg2Config: Remove the empty options.
The BlockSID actions not has code related to
them. Now we implement the BlockSID feature in
OpalPasswordDxe driver. So remove these actions
here.

Reviewed-by: Jiewen Yao <jiewen.yao@intel.com>
Contributed-under: TianoCore Contribution Agreement 1.0
Signed-off-by: Eric Dong <eric.dong@intel.com>
2016-11-21 15:37:56 +08:00
Eric Dong 9de81c126c SecurityPkg OpalPasswordDxe: Use PP actions to enable BlockSID.
Update the implementation, use physical presence defined actions to
update the BlockSid related status.

Reviewed-by: Jiewen Yao <jiewen.yao@intel.com>
Cc: Feng Tian <feng.tian@intel.com>
Contributed-under: TianoCore Contribution Agreement 1.0
Signed-off-by: Eric Dong <eric.dong@intel.com>
2016-11-21 15:37:56 +08:00
Eric Dong 177dca331f SecurityPkg TcgSmm: Enable Storage actions.
After enable storage related actions in the
TcgPhysicalPresenceStorageLib, use this library to support
storage related actions in this driver.

Reviewed-by: Jiewen Yao <jiewen.yao@intel.com>
Reviewed-by: Chao Zhang <chao.b.zhang@intel.com>
Contributed-under: TianoCore Contribution Agreement 1.0
Signed-off-by: Eric Dong <eric.dong@intel.com>
2016-11-21 15:37:56 +08:00
Eric Dong 509b0fe358 SecurityPkg SmmTcg2PhysicalPresenceLib: Enable Storage actions.
After enable storage related actions in the
TcgPhysicalPresenceStorageLib, use this library to support
storage related actions in this library.

Reviewed-by: Jiewen Yao <jiewen.yao@intel.com>
Reviewed-by: Chao Zhang <chao.b.zhang@intel.com>
Contributed-under: TianoCore Contribution Agreement 1.0
Signed-off-by: Eric Dong <eric.dong@intel.com>
2016-11-21 15:37:55 +08:00
Eric Dong 182d8208a4 SecurityPkg DxeTcgPhysicalPresenceLib: Enable Storage actions.
After enable storage related actions in the
TcgPhysicalPresenceStorageLib, use this library to support
storage related actions in this library.

Reviewed-by: Jiewen Yao <jiewen.yao@intel.com>
Reviewed-by: Chao Zhang <chao.b.zhang@intel.com>
Contributed-under: TianoCore Contribution Agreement 1.0
Signed-off-by: Eric Dong <eric.dong@intel.com>
2016-11-21 15:37:55 +08:00
Eric Dong d6b02b79b0 SecurityPkg DxeTcg2PhysicalPresenceLib: Enable Storage actions.
After enable storage related actions in the
TcgPhysicalPresenceStorageLib, use this library to support
storage related actions in this library.

Reviewed-by: Jiewen Yao <jiewen.yao@intel.com>
Reviewed-by: Chao Zhang <chao.b.zhang@intel.com>
Contributed-under: TianoCore Contribution Agreement 1.0
Signed-off-by: Eric Dong <eric.dong@intel.com>
2016-11-21 15:37:54 +08:00
Eric Dong 63556485ed SecurityPkg: Add SmmTcgPhysicalPresenceStorageLib.
Tcg Physical Presence spec defined some actions used
for storage device. Add Smm version library to handles
these actions.

Reviewed-by: Jiewen Yao <jiewen.yao@intel.com>
Reviewed-by: Chao Zhang <chao.b.zhang@intel.com>
Contributed-under: TianoCore Contribution Agreement 1.0
Signed-off-by: Eric Dong <eric.dong@intel.com>
2016-11-21 15:37:54 +08:00
Eric Dong b54946e0fc SecurityPkg: Add DxeTcgPhysicalPresenceStorageLib.
Tcg Physical Presence spec defined some actions used
for storage device. Add Dxe version library to handles
 these actions.

Reviewed-by: Jiewen Yao <jiewen.yao@intel.com>
Reviewed-by: Chao Zhang <chao.b.zhang@intel.com>
Contributed-under: TianoCore Contribution Agreement 1.0
Signed-off-by: Eric Dong <eric.dong@intel.com>
2016-11-21 15:37:54 +08:00
Eric Dong 132b73dd5c SecurityPkg: Add header file for TcgPhysicalPresenceStorageLib.
Reviewed-by: Jiewen Yao <jiewen.yao@intel.com>
Reviewed-by: Chao Zhang <chao.b.zhang@intel.com>
Contributed-under: TianoCore Contribution Agreement 1.0
Signed-off-by: Eric Dong <eric.dong@intel.com>
2016-11-21 15:37:53 +08:00
Eric Dong d1947ce509 SecurityPkg: Add definition for Physical Presence storage flag.
Reviewed-by: Jiewen Yao <jiewen.yao@intel.com>
Reviewed-by: Chao Zhang <chao.b.zhang@intel.com>
Contributed-under: TianoCore Contribution Agreement 1.0
Signed-off-by: Eric Dong <eric.dong@intel.com>
2016-11-21 15:37:53 +08:00
Star Zeng 3cabe66b20 SecurityPkg Tcg2Pei: Add comments into LogHashEvent()
Add comments into LogHashEvent() to describe the usage
of GetDigestListSize (DigestList).

Cc: Jiewen Yao <jiewen.yao@intel.com>
Cc: Chao Zhang <chao.b.zhang@intel.com>
Contributed-under: TianoCore Contribution Agreement 1.0
Signed-off-by: Star Zeng <star.zeng@intel.com>
Reviewed-by: Jiewen Yao <jiewen.yao@intel.com>
2016-11-21 10:38:34 +08:00
Star Zeng a9f1b2e2d7 SecurityPkg Tcg2Dxe: Get correct digest list size
Current code uses GetDigestListSize(DigestList) to get
digest list size, that is incorrect.
The code should get digest list size of digests copied
into event2 log, those digests are compacted, so
GetDigestListBinSize() should be used.

Cc: Jiewen Yao <jiewen.yao@intel.com>
Cc: Chao Zhang <chao.b.zhang@intel.com>
Contributed-under: TianoCore Contribution Agreement 1.0
Signed-off-by: Star Zeng <star.zeng@intel.com>
Reviewed-by: Jiewen Yao <jiewen.yao@intel.com>
2016-11-21 10:38:33 +08:00
Star Zeng ab5b1f31c2 SecurityPkg Tcg2Dxe: Filter inactive digest in event2 log from PEI HOB
Cc: Jiewen Yao <jiewen.yao@intel.com>
Cc: Chao Zhang <chao.b.zhang@intel.com>
Contributed-under: TianoCore Contribution Agreement 1.0
Signed-off-by: Star Zeng <star.zeng@intel.com>
Reviewed-by : Chao Zhang <chao.b.zhang@intel.com>
Reviewed-by: Jiewen Yao <jiewen.yao@intel.com>
2016-11-21 10:38:32 +08:00
Star Zeng ae1a4284a0 SecurityPkg TPM2: Update desc for param Buffer of GetDigestListSize()
To make the description more clear, update the description
for parameter Buffer of GetDigestListSize() to
"Buffer to hold copied TPML_DIGEST_VALUES compact binary.".

Cc: Jiewen Yao <jiewen.yao@intel.com>
Cc: Chao Zhang <chao.b.zhang@intel.com>
Contributed-under: TianoCore Contribution Agreement 1.0
Signed-off-by: Star Zeng <star.zeng@intel.com>
Reviewed-by : Chao Zhang <chao.b.zhang@intel.com>
Reviewed-by: Jiewen Yao <jiewen.yao@intel.com>
2016-11-21 10:38:31 +08:00
Star Zeng b8ae1f4de7 SecurityPkg TPM2: Add GetHashMaskFromAlgo() into Tpm2CommandLib
Add GetHashMaskFromAlgo() into Tpm2CommandLib for coming consumer.

Cc: Jiewen Yao <jiewen.yao@intel.com>
Cc: Chao Zhang <chao.b.zhang@intel.com>
Contributed-under: TianoCore Contribution Agreement 1.0
Signed-off-by: Star Zeng <star.zeng@intel.com>
Reviewed-by : Chao Zhang <chao.b.zhang@intel.com>
Reviewed-by: Jiewen Yao <jiewen.yao@intel.com>
2016-11-21 10:38:31 +08:00
Star Zeng 697c30b157 SecurityPkg TPM2: Make IsHashAlgSupportedInHashAlgorithmMask external
Current IsHashAlgSupportedInHashAlgorithmMask is only an internal
function, this patch makes it external for coming consumer.

Cc: Jiewen Yao <jiewen.yao@intel.com>
Cc: Chao Zhang <chao.b.zhang@intel.com>
Contributed-under: TianoCore Contribution Agreement 1.0
Signed-off-by: Star Zeng <star.zeng@intel.com>
Reviewed-by: Jiewen Yao <jiewen.yao@intel.com>
Reviewed-by : Chao Zhang <chao.b.zhang@intel.com>
2016-11-21 10:38:30 +08:00
Star Zeng be93a17bbd SecurityPkg TPM2: Assign real copied count in CopyDigestListToBuffer()
In CopyDigestListToBuffer() of Tpm2CommandLib, the count in returned
Buffer should be real copied DigestList count.

Cc: Jiewen Yao <jiewen.yao@intel.com>
Cc: Chao Zhang <chao.b.zhang@intel.com>
Contributed-under: TianoCore Contribution Agreement 1.0
Signed-off-by: Star Zeng <star.zeng@intel.com>
Reviewed-by: Jiewen Yao <jiewen.yao@intel.com>
2016-11-21 10:38:29 +08:00
Hao Wu 6a62309459 MdePkg BaseLib: API PathRemoveLastItem not handle root paths properly
https://bugzilla.tianocore.org/show_bug.cgi?id=239

When the input path for API PathRemoveLastItem() is a root path like
'fs0:\', the API will return TRUE (indicating a directory or file was
removed from the path) and modifies the path to 'fs0:'. In fact, there's
no directory or file removed in the above case.

This commit adds additional check to resolve this issue and modifies the
API's description to make it more straightforward.

Cc: Ruiyu Ni <ruiyu.ni@intel.com>
Cc: Liming Gao <liming.gao@intel.com>
Contributed-under: TianoCore Contribution Agreement 1.0
Signed-off-by: Hao Wu <hao.a.wu@intel.com>
Reviewed-by: Ruiyu Ni <ruiyu.ni@intel.com>
2016-11-21 09:23:25 +08:00
Fu Siyuan 632dcfd685 NetworkPkg: Check for the max DHCP packet length before use it.
This patch updates the PXE and HTTP boot driver to drop the input DHCP packet
if it exceed the maximum length.

Contributed-under: TianoCore Contribution Agreement 1.0
Signed-off-by: Fu Siyuan <siyuan.fu@intel.com>
Reviewed-By: Wu Jiaxin <jiaxin.wu@intel.com>
2016-11-18 16:30:50 +08:00
Fu Siyuan 4f6b33b460 MdeModulePkg: Check for the max DHCP packet length before use it.
This patch updates the PXE driver to drop the input DHCP packet if it
exceed the maximum length.

Contributed-under: TianoCore Contribution Agreement 1.0
Signed-off-by: Fu Siyuan <siyuan.fu@intel.com>
Reviewed-By: Wu Jiaxin <jiaxin.wu@intel.com>
2016-11-18 16:30:37 +08:00
Liming Gao bd5ef82698 MdePkg Base.h: Add add comments on __ prefix in enum VERIFY_UINTXX_ENUM_SIZE
Cc: Michael Kinney <michael.d.kinney@intel.com>
Contributed-under: TianoCore Contribution Agreement 1.0
Signed-off-by: Liming Gao <liming.gao@intel.com>
Reviewed-by: Michael Kinney <michael.d.kinney@intel.com>
2016-11-18 11:10:05 +08:00
Liming Gao c023a57e3b BaseTools gitignore: Ignore VS intermediate files *.obj and *.pdb
In V2, ignore .exe and .ilk files

Cc: Yonghong Zhu <yonghong.zhu@intel.com>
Contributed-under: TianoCore Contribution Agreement 1.0
Signed-off-by: Liming Gao <liming.gao@intel.com>
Reviewed-by: Michael Kinney <michael.d.kinney@intel.com>
Reviewed-by: Yonghong Zhu <yonghong.zhu@intel.com>
2016-11-18 11:07:46 +08:00
Jiewen Yao 2f790bcb0a OvmfPkg: Add 4K PE alignment to enable SMM page level protection.
Tested boot with below configuration:
IA32
IA32X64
X64

Tested boot with XD enabled/disabled.

Requested-by: Laszlo Ersek <lersek@redhat.com>
Cc: Jordan Justen <jordan.l.justen@intel.com>
Cc: Laszlo Ersek <lersek@redhat.com>
Contributed-under: TianoCore Contribution Agreement 1.0
Signed-off-by: Jiewen Yao <jiewen.yao@intel.com>
Tested-by: Laszlo Ersek <lersek@redhat.com>
Reviewed-by: Laszlo Ersek <lersek@redhat.com>
2016-11-18 10:57:21 +08:00
Jiewen Yao 750ec4cabd UefiCpuPkg/PiSmmCpu: Check XdSupport before set NX.
When XD is not supported, the BIT63 is reserved.
We should not set BIT63 in the page table.

Test OVMF IA32/IA32X64 with XD enabled/disabled.

Analyzed-by: Laszlo Ersek <lersek@redhat.com>
Cc: Laszlo Ersek <lersek@redhat.com>
Cc: Jeff Fan <jeff.fan@intel.com>
Cc: Michael D Kinney <michael.d.kinney@intel.com>
Cc: Laszlo Ersek <lersek@redhat.com>
Contributed-under: TianoCore Contribution Agreement 1.0
Signed-off-by: Jiewen Yao <jiewen.yao@intel.com>
Reviewed-by: Jeff Fan <jeff.fan@intel.com>
Tested-by: Laszlo Ersek <lersek@redhat.com>
2016-11-18 10:53:59 +08:00
Ruiyu Ni 0dc3fb06b2 MdeModulePkg/BdsDxe: Avoid overwriting PlatformRecovery####
Current implementation always creates PlatformRecovery0000
pointing to \EFI\BOOT\BOOT$(ARCH).efi but it may overwrite
PlatformRecovery#### created before (maybe by a DXE driver).

The patch only uses the smallest unused option number for
the \EFI\BOOT\BOOT$(ARCH).efi PlatformRecovery#### to avoid
overwriting already-created PlatformRecovery####.

Contributed-under: TianoCore Contribution Agreement 1.0
Signed-off-by: Ruiyu Ni <ruiyu.ni@intel.com>
Reviewed-by: Jie Lin <jie.lin@intel.com>
Reviewed-by: Sunny Wang <sunnywang@hpe.com>
2016-11-18 10:42:04 +08:00
Ruiyu Ni de67c35c8a MdeModulePkg/BdsDxe: Fix bug to run non-first PlatformRecovery####
The implementation doesn't check the LoadOptions[Index].Status but
only depends on the Status returned from
EfiBootManagerProcessLoadOption(), which results only the first
PlatformRecovery#### runs.

Contributed-under: TianoCore Contribution Agreement 1.0
Signed-off-by: Ruiyu Ni <ruiyu.ni@intel.com>
Reviewed-by: Jie Lin <jie.lin@intel.com>
Reviewed-by: Sunny Wang <sunnywang@hpe.com>
2016-11-18 10:42:04 +08:00
Ruiyu Ni 3fc46b79d8 MdeModulePkg/UefiBootManagerLib: Refine the debug message
Contributed-under: TianoCore Contribution Agreement 1.0
Signed-off-by: Ruiyu Ni <ruiyu.ni@intel.com>
Reviewed-by: Eric Dong <eric.dong@intel.com>
Reviewed-by: Sunny Wang <sunnywang@hpe.com>
2016-11-18 10:42:04 +08:00
Ruiyu Ni 5ce6fb99d4 PcAtChipsetPkg/PcRtc: Handle NULL table entry in RSDT/XSDT
The ACPI code may reserve the first entry for a certain table
(might be FACS) to help with OS compatible issues.
We need to skip the NULL table entry in RSDT/XSDT.

Contributed-under: TianoCore Contribution Agreement 1.0
Signed-off-by: Ruiyu Ni <ruiyu.ni@intel.com>
Cc: Sean Brogan <sean.brogan@microsoft.com>
Reviewed-by: Star Zeng <star.zeng@intel.com>
2016-11-18 10:38:39 +08:00
Jeff Fan ec16deeac9 UefiCpuPkg/SecCore: Correct print format for stack information
v2:
  Per Laszlo and Andrew's comments at
    https://lists.01.org/pipermail/edk2-devel/2016-November/004759.html
  SecCoreData->StackBase is VOID * type. We should use %p to dump VOID * type.
  SecCoreData->StackSize is UINTN type, but %x only could print unsinged-int
  type. We will cast it to UINT32 firstly and then use %x to print it.

Cc: Laszlo Ersek <lersek@redhat.com>
Cc: Andrew Fish <afish@apple.com>
Cc: Feng Tian <feng.tian@intel.com>
Cc: Michael D Kinney <michael.d.kinney@intel.com>
Contributed-under: TianoCore Contribution Agreement 1.0
Signed-off-by: Jeff Fan <jeff.fan@intel.com>
Reviewed-by: Laszlo Ersek <lersek@redhat.com>
2016-11-18 09:43:53 +08:00
Jeff Fan 5c88af795d MdeModulePkg/PiSmmCpuDxeSmm: Check RegisterCpuInterruptHandler status
Once platform selects the incorrect instance, the caller could know it from
return status and ASSERT().

Cc: Feng Tian <feng.tian@intel.com>
Cc: Michael D Kinney <michael.d.kinney@intel.com>
Contributed-under: TianoCore Contribution Agreement 1.0
Signed-off-by: Jeff Fan <jeff.fan@intel.com>
Reviewed-by: Michael Kinney <michael.d.kinney@intel.com>
2016-11-18 09:43:52 +08:00
Jeff Fan 0e99d51637 MdeModulePkg/CpuExceptionHanderLibNull: RegisterCpuInterruptHandler()
Current CpuExceptionHanderLibNull instance returns EFI_SUCCESS for all three
services. If platform does not want to hook the Exception vector for some
modules (For example DxeCore), it could select this NULL instance in DSC file
for those module. But some modules that want to consume
RegisterCpuInterruptHandler() cannot use NULL instance. If platform does not
select the correct library instance, it will does work. But the caller does not
recognize it.

This update is to return EFI_UNSUPPORTED on RegisterCpuInterruptHandler() in
NULL instance instead of return EFI_SUCCESS. Once platform selects this NULL
instance, the caller could know it from return status.

Cc: Feng Tian <feng.tian@intel.com>
Cc: Michael D Kinney <michael.d.kinney@intel.com>
Contributed-under: TianoCore Contribution Agreement 1.0
Signed-off-by: Jeff Fan <jeff.fan@intel.com>
Reviewed-by: Michael Kinney <michael.d.kinney@intel.com>
2016-11-18 09:43:51 +08:00
Michael Kinney c773514d45 UefiCpuPkg/PiSmmCpuDxeSmm: Add volatile to mNumberToFinish
Add volatile qualifier to mNumberToFinish to prevent GCC 5.4
compiler from optimizing away required logic in ACPI S3 resume.

Cc: Liming Gao <liming.gao@intel.com>
Cc: Laszlo Ersek <lersek@redhat.com>
Cc: Andrew Fish <afish@apple.com>
Cc: Jeff Fan <jeff.fan@intel.com>
Contributed-under: TianoCore Contribution Agreement 1.0
Signed-off-by: Michael Kinney <michael.d.kinney@intel.com>
Reviewed-by: Laszlo Ersek <lersek@redhat.com>
Reviewed-by: Jeff Fan <jeff.fan@intel.com>
2016-11-17 17:37:50 -08:00
Michael Kinney 672b80c8b7 UefiCpuPkg/PiSmmCpuDxeSmm: TransferApToSafeState() use UINTN params
Update TransferApToSafeState() use UINTN params to reduce the
number of type casts required in these calls.  Also change
the NumberToFinish parameter from UINT32* to UINTN
NumberToFinishAddress to resolve issues with conversion from
a volatile pointer to a non-volatile pointer.  The assembly
code that receives the NumberToFinishAddress value must treat
that memory location as a volatile to track the number of APs.

Cc: Liming Gao <liming.gao@intel.com>
Cc: Laszlo Ersek <lersek@redhat.com>
Cc: Andrew Fish <afish@apple.com>
Cc: Jeff Fan <jeff.fan@intel.com>
Contributed-under: TianoCore Contribution Agreement 1.0
Signed-off-by: Michael Kinney <michael.d.kinney@intel.com>
Reviewed-by: Laszlo Ersek <lersek@redhat.com>
Reviewed-by: Jeff Fan <jeff.fan@intel.com>
2016-11-17 17:37:50 -08:00
Giri P Mudusuru 0468303899 IntelSiliconPkg: Add DxeSmbiosDataHobLib
Added NULL Library constructor DxeSmbiosDataHobLib which adds SMBIOS
records from gIntelSmbiosDataHobGuid HOB to SMBIOS table using
SMBIOS protocol.

Cc: Jiewen Yao <jiewen.yao@intel.com>
Cc: Star Zeng <star.zeng@intel.com>
Cc: Michael Kinney <michael.d.kinney@intel.com>
Contributed-under: TianoCore Contribution Agreement 1.0
Signed-off-by: Giri P Mudusuru <giri.p.mudusuru@intel.com>
Reviewed-by: Jiewen Yao <jiewen.yao@intel.com>
2016-11-17 17:35:02 -08:00
Michael Kinney fa1beef508 MdePkg/BaseSynchronizationLib: Fix function names in function headers
Some of the function names in function header comment blocks in
assembly files do not match the symbol name in the assembly sources.
Update function header comment blocks to match symbol name.

Cc: Liming Gao <liming.gao@intel.com>
Cc: Laszlo Ersek <lersek@redhat.com>
Cc: Andrew Fish <afish@apple.com>
Cc: Jeff Fan <jeff.fan@intel.com>
Contributed-under: TianoCore Contribution Agreement 1.0
Signed-off-by: Michael Kinney <michael.d.kinney@intel.com>
Reviewed-by: Laszlo Ersek <lersek@redhat.com>
Reviewed-by: Liming Gao <liming.gao@intel.com>
2016-11-17 17:08:26 -08:00
Michael Kinney 4cee954ea8 MdePkg/BaseSynchronizationLib: Add volatile Interlocked*() APIs
The SpinLock functions in the SynchronicationLib use volatile
parameters to keep compiler from optimizing these functions
too much.  The volatile keyword is missing from the Interlocked*()
functions in this same library instance.  Update the library instance
to consistently use volatile on all functions in the
SynchronizationLib class.

Cc: Liming Gao <liming.gao@intel.com>
Cc: Laszlo Ersek <lersek@redhat.com>
Cc: Andrew Fish <afish@apple.com>
Cc: Jeff Fan <jeff.fan@intel.com>
Contributed-under: TianoCore Contribution Agreement 1.0
Signed-off-by: Michael Kinney <michael.d.kinney@intel.com>
Reviewed-by: Laszlo Ersek <lersek@redhat.com>
Reviewed-by: Liming Gao <liming.gao@intel.com>
2016-11-17 17:08:19 -08:00
Michael Kinney 7375f3f11a MdePkg/Include: Add volatile to SynchronizationLib parameters
The SpinLock functions in the SynchronicationLib use volatile
parameters to keep compiler from optimizing these functions
too much.  The volatile keyword is missing from the Interlocked*()
functions in this same library class.  Update the library class
to consistently use volatile on all functions in this class.

Cc: Liming Gao <liming.gao@intel.com>
Cc: Laszlo Ersek <lersek@redhat.com>
Cc: Andrew Fish <afish@apple.com>
Cc: Jeff Fan <jeff.fan@intel.com>
Contributed-under: TianoCore Contribution Agreement 1.0
Signed-off-by: Michael Kinney <michael.d.kinney@intel.com>
Reviewed-by: Laszlo Ersek <lersek@redhat.com>
Reviewed-by: Liming Gao <liming.gao@intel.com>
2016-11-17 17:08:11 -08:00
Hao Wu 8b66342c6b SignedCapsulePkg Universal: Init local variables before using them
Cc: Jiewen Yao <jiewen.yao@intel.com>
Contributed-under: TianoCore Contribution Agreement 1.0
Signed-off-by: Hao Wu <hao.a.wu@intel.com>
Reviewed-by: Jiewen Yao <jiewen.yao@intel.com>
2016-11-18 08:46:37 +08:00
Hao Wu cf2ddcf133 SignedCapsulePkg IniParsingLib: ASSERT to ensure 'Value' is not NULL
Function GetStringFromDataFile() ensures its fourth (output) parameter
will not be NULL when the return status is EFI_SUCCESS.

This commit adds ASSERT as warnings for the case that will not happen.

Cc: Jiewen Yao <jiewen.yao@intel.com>
Contributed-under: TianoCore Contribution Agreement 1.0
Signed-off-by: Hao Wu <hao.a.wu@intel.com>
Reviewed-by: Jiewen Yao <jiewen.yao@intel.com>
2016-11-18 08:46:32 +08:00
Hao Wu b4dc05e854 BaseTools/BuildEnv: Do not modify the env 'PACKAGES_PATH' in BuildEnv
https://bugzilla.tianocore.org/show_bug.cgi?id=236

The script 'BuildEnv' modifies the value of the environment variable
'PACKAGES_PATH' (line 44). The script will substitute the ':' symbol
(separating multiple paths) with a space.

This is not supposed to happen since users might later use 'PACKAGES_PATH'
during the code-building process under a multiple-workspace scenario.

Cc: Liming Gao <liming.gao@intel.com>
Cc: Yonghong Zhu <yonghong.zhu@intel.com>
Contributed-under: TianoCore Contribution Agreement 1.0
Signed-off-by: Hao Wu <hao.a.wu@intel.com>
Reviewed-by: Liming Gao <liming.gao@intel.com>
2016-11-18 08:32:28 +08:00
Maurice Ma 4e7872d2f7 CorebootPayloadPkg/CbSupportPei: Fix the memory map issue
When coreboot reports memory range across 1MB, the current code
cannot handle it properly. In this case the range should be
adjusted to start from 1MB instead since the memory resource
below 1MB has been preprocessed by CbSupportPei module.

This patch fixed the coreboot + UEFI payload hang issue when
running on QEMU due to incorrect memory map.

Cc: Prince Agyeman <prince.agyeman@intel.com>
Contributed-under: TianoCore Contribution Agreement 1.0
Signed-off-by: Maurice Ma <maurice.ma@intel.com>
Reviewed-by: Prince Agyeman <prince.agyeman@intel.com>
2016-11-17 14:49:11 -08:00
Maurice Ma 28b3a713b6 CorebootPayloadPkg: Allow PciLib instance selection
On old platform without PCIe express support, the PciLib needs to
be mapped to PciLibCf8 instance to make it work.  On new platform
with PCIe express support, the PciLib needs to be mapped to
PciLibPciExpress to allow access to extended PCIe configuration
space. This patch allows to select the PciLib instance between
PciLibCf8 and PciLibPciExpress using the PCIE_BASE macro through
build command line.

Cc: Prince Agyeman <prince.agyeman@intel.com>
Contributed-under: TianoCore Contribution Agreement 1.0
Signed-off-by: Maurice Ma <maurice.ma@intel.com>
Reviewed-by: Prince Agyeman <prince.agyeman@intel.com>
2016-11-17 10:21:52 -08:00
Michael Kinney 5ea2bad0d9 MdePkg/BaseMemoryLib: Fix VS2015 build error
https://bugzilla.tianocore.org/show_bug.cgi?id=237

Make the smallest change possible to workaround a VS2015
build error.  The change is to the loop that handles the
case where neither the source nor the destination are
64-bit or 32-bit aligned and the logic falls through to
a loop that performs the copy as bytes.  Only the loop
that copies bytes backwards needs to be updated to avoid
the VS2015 build error.

Cc: Ard Biesheuvel <ard.biesheuvel@linaro.org>
Cc: Liming Gao <liming.gao@intel.com>
Contributed-under: TianoCore Contribution Agreement 1.0
Signed-off-by: Michael Kinney <michael.d.kinney@intel.com>
Reviewed-by: Liming Gao <liming.gao@intel.com>
2016-11-17 09:43:23 -08:00
Laszlo Ersek 2048ab4b3e IntelSiliconPkg/IntelSiliconPkg.dec: drop bogus semicolon from GUID def
The DEC spec doesn't allow the trailing semicolon:

  2.6 [Guids] Usage

  GuidCName = {C Format Guid Value} # Comment

Cc: Giri P Mudusuru <giri.p.mudusuru@intel.com>
Cc: Jiewen Yao <jiewen.yao@intel.com>
Contributed-under: TianoCore Contribution Agreement 1.0
Signed-off-by: Laszlo Ersek <lersek@redhat.com>
Reviewed-by: Jiewen Yao <jiewen.yao@intel.com>
2016-11-17 14:49:09 +01:00
Laszlo Ersek dd3fa0cd72 UefiCpuPkg/MpInitLib: support 64-bit AP stack addresses
The cached "CPU_INFO_IN_HOB.ApTopOfStack" field currently has type UINT32.
This is not ideal because the AP stacks are located within
"CpuMpData->Buffer", which is allocated with a plain AllocatePages() call
in MpInitLibInitialize():

  platform  CpuMpPei included  PEI RAM > 4GB  result
  --------  -----------------  -------------  ------
  Ia32      *                  n/a            good
  Ia32X64   no                 n/a            BAD
  Ia32X64   yes                n/a            good
  X64       no                 *              BAD
  X64       yes                no             good
  X64       yes                yes            BAD

- If we are on an Ia32X64 or X64 platform that does not include CpuMpPei,
  then CpuDxe cannot reuse the CPU_INFO_IN_HOB structures preallocated by
  CpuMpPei (through the CpuInitMpLib GUID HOB), and then AllocatePages()
  -- invoked first in 64-bit DXE -- could return an address outside of
  32-bit address space.

- If we are on an X64 platform where the permanent PEI RAM extends above
  the 32-bit address space, then the same issue can surface even if
  CpuMpPei is included: even the original allocation of the
  CPU_INFO_IN_HOB structures, by CpuMpPei, could be satisfied from above
  4GB.

The original "AP init" branch in "X64/MpFuncs.nasm" correctly considers a
64-bit stack start: the "MP_CPU_EXCHANGE_INFO.StackStart" field has type
UINTN, and the code uses QWORD addition and movement to set RSP from it.

Adapt the "GetApicId" branch of "X64/MpFuncs.nasm":

- change the type of "CPU_INFO_IN_HOB.ApTopOfStack" to UINT64,

- remove the explicit truncation to UINT32 in InitializeApData(),

- update the "GetNextProcNumber" iteration size to the new size of
  "CPU_INFO_IN_HOB",

- set RSP with a QWORD movement from "CPU_INFO_IN_HOB.ApTopOfStack".

Because the same CPU_INFO_IN_HOB structure is used by "Ia32/MpFuncs.nasm",
we have to update the "GetNextProcNumber" iteration size there as well.
The ESP setting can be preserved as a DWORD movement from the original
offset (decimal 12), since our integers are little endian.

Cc: Jeff Fan <jeff.fan@intel.com>
Fixes: 845c5be1fd
Contributed-under: TianoCore Contribution Agreement 1.0
Signed-off-by: Laszlo Ersek <lersek@redhat.com>
Reviewed-by: Jeff Fan <jeff.fan@intel.com>
2016-11-17 10:58:18 +01:00
Laszlo Ersek 00650c531a UefiCpuPkg/MpInitLib/X64/MpFuncs.nasm: fix fatal typo
The recent patch "UefiCpuPkg/MpInitLib: Program AP stack in fixed address"
inadvertently broke the first startup of APs during X64 PEI, because in
the TestLock section of the code, it replaced the access to the
NumApsExecuting counter with an access to the unrelated InitFlag field.

Cc: Jeff Fan <jeff.fan@intel.com>
Fixes: 845c5be1fd
Contributed-under: TianoCore Contribution Agreement 1.0
Signed-off-by: Laszlo Ersek <lersek@redhat.com>
Reviewed-by: Jeff Fan <jeff.fan@intel.com>
2016-11-17 10:58:07 +01:00
Laszlo Ersek 5797f61c55 UefiCpuPkg/MpInitLib/X64/MpFuncs.nasm: remove superfluous instruction
At this point, ESI still has the value from EBX.

Cc: Jeff Fan <jeff.fan@intel.com>
Contributed-under: TianoCore Contribution Agreement 1.0
Signed-off-by: Laszlo Ersek <lersek@redhat.com>
Reviewed-by: Jeff Fan <jeff.fan@intel.com>
2016-11-17 10:57:57 +01:00
Laszlo Ersek 3a9aa635be UefiCpuPkg/DxeMpInitLib: remove duplicate HobLib class dependency
Cc: Jeff Fan <jeff.fan@intel.com>
Contributed-under: TianoCore Contribution Agreement 1.0
Signed-off-by: Laszlo Ersek <lersek@redhat.com>
Reviewed-by: Jeff Fan <jeff.fan@intel.com>
2016-11-17 10:57:33 +01:00