https://bugzilla.tianocore.org/show_bug.cgi?id=560
Update X64 NASM file to match IA32 NASM file
and use FINIT instruction instead of hand
assembled hex values for the FINIT instruction.
Cc: Jeff Fan <jeff.fan@intel.com>
Cc: Liming Gao <liming.gao@intel.com>
Contributed-under: TianoCore Contribution Agreement 1.0
Signed-off-by: Michael D Kinney <michael.d.kinney@intel.com>
Reviewed-by: Jeff Fan <jeff.fan@intel.com>
https://bugzilla.tianocore.org/show_bug.cgi?id=556
NASM requires read-only data sections to use the section
name .rodata. This fix changes .rdata to .rodata.
The build failure from use of .rdata is seen when using
the XCODE5 tool chain.
Section "7.8.1 macho extensions to the SECTION Directive"
of the NASM documentation at http://www.nasm.us/doc/
describes the section name requirements.
Cc: Jeff Fan <jeff.fan@intel.com>
Cc: Andrew Fish <afish@apple.com>
Contributed-under: TianoCore Contribution Agreement 1.0
Signed-off-by: Michael Kinney <michael.d.kinney@intel.com>
Reviewed-by: Jeff Fan <jeff.fan@intel.com>
The BaseTools/Scripts/ConvertMasmToNasm.py script was used to convert
X64/InitializeFpu.asm to X64/InitializeFpu.nasm.
And, manually add .rdata section.
Contributed-under: TianoCore Contribution Agreement 1.0
Signed-off-by: Liming Gao <liming.gao@intel.com>
Michael Kinney
Liming Gao