This protocol is to abstract DMA access from IOMMU.
1) Intel "DMAR" ACPI table.
2) AMD "IVRS" ACPI table
3) ARM "IORT" ACPI table.
There might be multiple IOMMU engines on one platform.
For example, one for graphic and one for rest PCI devices
(such as ATA/USB).
All IOMMU engines are reported by one ACPI table.
All IOMMU protocol provider should be based upon ACPI table.
This single IOMMU protocol can handle multiple IOMMU engines on one system.
This IOMMU protocol provider can use UEFI device path to distinguish
if the device is graphic or ATA/USB, and find out corresponding
IOMMU engine.
The IOMMU protocol provides 2 capabilities:
A) Set DMA access attribute - such as write/read control.
B) Remap DMA memory - such as remap above 4GiB system memory address
to below 4GiB device address.
It provides AllocateBuffer/FreeBuffer/Map/Unmap for DMA memory.
The remapping can be static (fixed at build time) or dynamic (allocate
at runtime).
4) AMD "SEV" feature.
We can have an AMD SEV specific IOMMU driver to produce IOMMU protocol,
and manage SEV bit.
Cc: Ruiyu Ni <ruiyu.ni@intel.com>
Cc: Leo Duran <leo.duran@amd.com>
Cc: Brijesh Singh <brijesh.singh@amd.com>
Cc: Ard Biesheuvel <ard.biesheuvel@linaro.org>
Previous patch Tested-by: Brijesh Singh <brijesh.singh@amd.com>
Previous patch Tested-by: Ard Biesheuvel <ard.biesheuvel@linaro.org>
Contributed-under: TianoCore Contribution Agreement 1.0
Signed-off-by: Jiewen Yao <jiewen.yao@intel.com>
Reviewed-by: Ruiyu Ni <ruiyu.ni@intel.com>
Reviewed-by: Leo Duran <leo.duran@amd.com>
Given the agreement on the edk2-devel regarding the fact that the
notion whether or not a 'platform has ACPI' is a universal one, move
the PlatformHasAcpi GUID to MdeModulePkg.
Contributed-under: TianoCore Contribution Agreement 1.0
Signed-off-by: Ard Biesheuvel <ard.biesheuvel@linaro.org>
Reviewed-by: "Zeng, Star" <star.zeng@intel.com>
Reviewed-by: Laszlo Ersek <lersek@redhat.com>
Reviewed-by: Leif Lindholm <leif.lindholm@linaro.org>
This PCD holds the address mask for page table entries when memory
encryption is enabled on AMD processors supporting the Secure Encrypted
Virtualization (SEV) feature.
Cc: Feng Tian <feng.tian@intel.com>
Cc: Star Zeng <star.zeng@intel.com>
Cc: Laszlo Ersek <lersek@redhat.com>
Contributed-under: TianoCore Contribution Agreement 1.0
Signed-off-by: Brijesh Singh <brijesh.singh@amd.com>
Signed-off-by: Leo Duran <leo.duran@amd.com>
Reviewed-by: Star Zeng <star.zeng@intel.com>
Define a new fixed/patchable PCD that sets the DXE memory protection
policy: its primary use is to define which memory types should have
their executable permissions removed. Combined with the image protection
policy, this can be used to implement a strict W^X policy, i.e.. a policy
where no regions exist that are both executable and writable at the same
time.
Contributed-under: TianoCore Contribution Agreement 1.0
Signed-off-by: Ard Biesheuvel <ard.biesheuvel@linaro.org>
Reviewed-by: Jiewen Yao <jiewen.yao@intel.com>
This PCD is linked by PiSmmCore to control if it enables
SMI handler profile feature.
Cc: Feng Tian <feng.tian@intel.com>
Cc: Star Zeng <star.zeng@intel.com>
Cc: Michael D Kinney <michael.d.kinney@intel.com>
Cc: Laszlo Ersek <lersek@redhat.com>
Contributed-under: TianoCore Contribution Agreement 1.0
Signed-off-by: Jiewen Yao <jiewen.yao@intel.com>
Reviewed-by: Star Zeng <star.zeng@intel.com>
This header file defines:
1) An SMI handler profile protocol. So that SmmChildDispatch
module can register the hardware SMI handler information.
2) The SMI handler profile communication buffer. So that
a shell application can use SMM communication to get the
SMI handler profile info.
Cc: Feng Tian <feng.tian@intel.com>
Cc: Star Zeng <star.zeng@intel.com>
Cc: Michael D Kinney <michael.d.kinney@intel.com>
Cc: Laszlo Ersek <lersek@redhat.com>
Contributed-under: TianoCore Contribution Agreement 1.0
Signed-off-by: Jiewen Yao <jiewen.yao@intel.com>
Add the EFI_PRINT2S_PROTOCOL as a safe version of the EFI_PRINT2_PROTOCOL,
the EFI_PRINT2S_PROTOCOL replaces the following 2 services in
EFI_PRINT2_PROTOCOL:
UNICODE_VALUE_TO_STRING
ASCII_VALUE_TO_STRING
with:
UNICODE_VALUE_TO_STRING_S
ASCII_VALUE_TO_STRING_S
The 2 new services perform checks to the input parameters and will return
relative status to reflect the check result.
Return RETURN_INVALID_PARAMETER when:
1). The input Buffer is NULL.
2). The input BufferSize is greater than (PcdMaximumUnicodeStringLength *
sizeof (CHAR16) + 1) for UnicodeValueToStringS or greater than
PcdMaximumAsciiStringLength for AsciiValueToStringS.
3). The input Flags is not set properly.
4). The input Width is not smaller than MAXIMUM_VALUE_CHARACTERS.
Return RETURN_BUFFER_TOO_SMALL when:
1). The input BufferSize cannot hold the converted value.
Contributed-under: TianoCore Contribution Agreement 1.0
Signed-off-by: Hao Wu <hao.a.wu@intel.com>
Reviewed-by: Liming Gao <liming.gao@intel.com>
Some Pcds are added to the dec file, but miss to add the
prompt&&help info to the uni file, now add them.
Cc: Jiewen Yao <jiewen.yao@intel.com>
Contributed-under: TianoCore Contribution Agreement 1.0
Signed-off-by: Dandan Bi <dandan.bi@intel.com>
Reviewed-by: Jiewen Yao <jiewen.yao@intel.com>
Non-discoverable devices need to be registered explicitly by the platform.
Introduce a helper library that takes care of this.
This implementation currently only supports registering devices that are
covered by one or more MMIO resources. The underlying protocol allows for
more flexibility than that, but this is currently sufficient for the use
cases that we know about.
Contributed-under: TianoCore Contribution Agreement 1.0
Signed-off-by: Ard Biesheuvel <ard.biesheuvel@linaro.org>
Reviewed-by: Ruiyu Ni <ruiyu.ni@intel.com>
Tested-by: Marcin Wojtas <mw@semihalf.com>
Introduce a protocol that can be exposed by a platform for devices that
are not discoverable, usually because they are wired straight to the
memory bus rather than to an enumerable bus like PCI or USB.
Contributed-under: TianoCore Contribution Agreement 1.0
Signed-off-by: Ard Biesheuvel <ard.biesheuvel@linaro.org>
Reviewed-by: Ruiyu Ni <ruiyu.ni@intel.com>
Tested-by: Marcin Wojtas <mw@semihalf.com>
* Introduce a generic Debugger Configuration protocol.
* Add private configuration data in the EBC Debugger and make it
register the Debugger Configuration protocol on initialization.
* Add a shell application that uses the protocol above to access
the private data in order to configure the EBC debugger.
Cc: Jiewen Yao <jiewen.yao@intel.com>
Contributed-under: TianoCore Contribution Agreement 1.0
Signed-off-by: Pete Batard <pete@akeo.ie>
reviewed-by: Jiewen Yao <jiewen.yao@intel.com>
This table describes the SMM memory attributes.
Cc: Jeff Fan <jeff.fan@intel.com>
Cc: Feng Tian <feng.tian@intel.com>
Cc: Star Zeng <star.zeng@intel.com>
Cc: Michael D Kinney <michael.d.kinney@intel.com>
Cc: Laszlo Ersek <lersek@redhat.com>
Contributed-under: TianoCore Contribution Agreement 1.0
Signed-off-by: Jiewen Yao <jiewen.yao@intel.com>
Tested-by: Laszlo Ersek <lersek@redhat.com>
Reviewed-by: Jeff Fan <jeff.fan@intel.com>
Reviewed-by: Michael D Kinney <michael.d.kinney@intel.com>
1) Add capsule related library.
FmpAuthenticationLib
2) Add capsule related status code PCD.
PcdStatusCodeSubClassCapsule
PcdCapsuleStatusCodeProcessCapsulesBegin
PcdCapsuleStatusCodeProcessCapsulesEnd
PcdCapsuleStatusCodeUpdatingFirmware
PcdCapsuleStatusCodeUpdateFirmwareSuccess
PcdCapsuleStatusCodeUpdateFirmwareFailed
PcdCapsuleStatusCodeResettingSystem
3) Add capsule status variable PCD - CapsuleMax value.
PcdCapsuleMax
4) Add system FMP indicator PCD - used by ESRT.
PcdSystemFmpCapsuleImageTypeIdGuid
5) Add PcdTestKeyUsed PCD.
This PCD can be set by platform to indicate if there is any
test key used in current BIOS, such as recovery key,
or capsule update key.
Then the generic UI may consume this PCD to show warning information.
Other platform driver may also consume this PCD to know such info,
and report it via platform specific way.
Cc: Feng Tian <feng.tian@intel.com>
Cc: Star Zeng <star.zeng@intel.com>
Cc: Michael D Kinney <michael.d.kinney@intel.com>
Cc: Liming Gao <liming.gao@intel.com>
Cc: Chao Zhang <chao.b.zhang@intel.com>
Contributed-under: TianoCore Contribution Agreement 1.0
Signed-off-by: Jiewen Yao <jiewen.yao@intel.com>
Reviewed-by: Liming Gao <liming.gao@intel.com>
Reviewed-by: Michael Kinney <michael.d.kinney@intel.com>
Tested-by: Michael Kinney <michael.d.kinney@intel.com>
When PciBus is built as EBC, PcdPciDegradeResourceForOptionRom does
not have associated value resulting build failure.
The patch sets the default value to TRUE, covering the EBC ARCH.
Contributed-under: TianoCore Contribution Agreement 1.0
Signed-off-by: Ruiyu Ni <ruiyu.ni@intel.com>
Acked-by: Laszlo Ersek <lersek@redhat.com>
Acked-by: Ard Biesheuvel <ard.biesheuvel@linaro.org>
Reviewed-by: Feng Tian <feng.tian@intel.com>
This PCD is used to indicated the recovery file name.
The previous name - FvMain.Fv is hardcoded in FatPei and CdExpressPei.
It does not make sense to force the name.
Now a platform may use any recovery file name.
Tested-by: Michael D Kinney <michael.d.kinney@intel.com>
Cc: Feng Tian <feng.tian@intel.com>
Cc: Star Zeng <star.zeng@intel.com>
Cc: Liming Gao <liming.gao@intel.com>
Cc: Eric Dong <eric.dong@intel.com>
Cc: Ruiyu Ni <ruiyu.ni@intel.com>
Contributed-under: TianoCore Contribution Agreement 1.0
Signed-off-by: Jiewen Yao <jiewen.yao@intel.com>
Reviewed-by: Feng Tian <feng.tian@intel.com>
Reviewed-by: Ruiyu Ni <ruiyu.ni@intel.com>
Reviewed-by: Michael D Kinney <michael.d.kinney@intel.com>
The two libraries are created to support old BootLogoLib to
decode the images. Due to the new BootLogoLib starts using
HiiImageEx interfaces, the two libraries are not needed.
Contributed-under: TianoCore Contribution Agreement 1.0
Signed-off-by: Ruiyu Ni <ruiyu.ni@intel.com>
Reviewed-by: Liming Gao <liming.gao@intel.com>
1. Change PlatformLogo protocol to return EFI_IMAGE_INPUT instead of
RAW image data. PlatformLogo implementation can use HiiImageEx to
decode the image if it's JPEG or PNG format.
2. Change BootLogoLib to consume the new PlatformLogo protocol.
3. Change BootLogoEnableLogo() to only use images returned from
PlatformLogo protocol.
Contributed-under: TianoCore Contribution Agreement 1.0
Reviewed-by: Liming Gao <liming.gao@intel.com>
Cc: Eric Dong <eric.dong@intel.com>
Cc: Dandan Bi <dandan.bi@intel.com>
Signed-off-by: Ruiyu Ni <ruiyu.ni@intel.com>
The 'universal' PCI bus driver in MdeModulePkg contains a quirk to
degrade 64-bit PCI MMIO BARs to 32-bit in the presence of an option
ROM on the same PCI controller.
This quirk is highly specific to not just the X64 architecture in general,
but to the PC platform in particular, given that only X64 platforms that
require legacy PC BIOS compatibility require it. However, making the
quirk dependent on the presence of the legacy BIOS protocol met with
resistance, due to the fact that it introduces a dependency on the
IntelFrameworkModulePkg package.
So instead, make the quirk configurable, by introducing a feature flag PCD
'PcdPciDegradeResourceForOptionRom' which defaults to TRUE only for X64.
Contributed-under: TianoCore Contribution Agreement 1.0
Signed-off-by: Ard Biesheuvel <ard.biesheuvel@linaro.org>
Reviewed-by: Ruiyu Ni <ruiyu.ni@intel.com>
Provides services to record memory profile of multilevel caller.
Cc: Jiewen Yao <jiewen.yao@intel.com>
Contributed-under: TianoCore Contribution Agreement 1.0
Signed-off-by: Star Zeng <star.zeng@intel.com>
Reviewed-by: Jiewen Yao <jiewen.yao@intel.com>
Current memory profile feature:
1. Shows which line of code calls gBS->AllocateXXX(). But most entries
are from MemoryAllocationLib.
2. Records at the start.
3. Records all modules.
Enhanced memory profile feature:
1. User can know which line of code calls AllocateXXX() API instead of
gBS->Allocate().
2. User can know which line of code calls a specific API that will call
AllocateXXX().
3. User can know total memory allocated by a specific line of code.
4. User can configure to record single module.
5. User can configure when to enable recording.
6. User can know RVA<->Symbol (Function, Source, Line).
For the enhanced memory profile feature,
1. Extend MEMORY_PROFILE_DRIVER_INFO to include PdbString.
2. Extend MEMORY_PROFILE_ALLOC_INFO to include ActionString.
3. Extend MEMORY_PROFILE_ACTION to indicate action in memory allocation
lib and user defined action.
4. Extend memory profile protocol to include GetRecordingState/
SetRecordingState/Record.
5. Define SMM memory profile protocol.
6. Extend PcdMemoryProfilePropertyMask to support disable recording at
the start.
7. Introduce new PCD PcdMemoryProfileDriverPath to control which drivers
need memory profile data.
Cc: Jiewen Yao <jiewen.yao@intel.com>
Contributed-under: TianoCore Contribution Agreement 1.0
Signed-off-by: Star Zeng <star.zeng@intel.com>
Reviewed-by: Jiewen Yao <jiewen.yao@intel.com>
Prevent the BmRepairAllControllers routine in an infinite loop
Contributed-under: TianoCore Contribution Agreement 1.0
Signed-off-by: Gary Li <garyli@hpe.com>
Reviewed-by: Ruiyu Ni <ruiyu.ni@intel.com>
Reviewed-by: Liming Gao <liming.gao@intel.com>
This configuration table is used to describe platform pre-allocated memory
for SMM communication buffer. If DXE driver wants to communicate with SMM
agent, it can use this memory as SMM communication buffer instead of allocate
new memory region.
This is designed to meet Microsoft WSMT table definition on FIXED_COMM_BUFFERS
requirement.
Cc: Feng Tian <feng.tian@intel.com>
Cc: Laszlo Ersek <lersek@redhat.com>
Contributed-under: TianoCore Contribution Agreement 1.0
Signed-off-by: Jiewen Yao <jiewen.yao@intel.com>
Reviewed-by: Feng Tian <feng.tian@intel.com>
gEfiPs2PolicyProtocolGuid and PcdFastPS2Detection was missed when
resolving the conflict.
Check in the two definition to MdeModulePkg.dec to fix build failure.
Contributed-under: TianoCore Contribution Agreement 1.0
Signed-off-by: Ruiyu Ni <ruiyu.ni@intel.com>
Reviewed-by: Feng Tian <feng.tian@intel.com>
The S3Ready() functional code in AcpiS3SaveDxe of IntelFrameworkModulePkg
is to do ACPI S3 Context save. In fact, that is not really related to
Intel framework ACPI S3 protocol.
IntelFrameworkModulePkg will be deprecated step by step, so move the
functional code to MdeModulePkg and S3SaveStateDxe is a good place.
The ACPI global variable related code is leaved as is in IntelFrameworkModulePkg
AcpiS3SaveDxe for compatibility.
PcdS3BootScriptStackSize is also moved from IntelFrameworkModulePkg.
The functional code need to get ACPI FACS table and consume LockBoxLib,
so need to be before DxeSmmReadyToLock that will shut down SMM lock box
interface, EndOfDxe is a good point (OVMF AcpiS3SaveDxe has the reference
implementation).
Cc: Jiewen Yao <jiewen.yao@intel.com>
Cc: Feng Tian <feng.tian@intel.com>
Contributed-under: TianoCore Contribution Agreement 1.0
Signed-off-by: Star Zeng <star.zeng@intel.com>
Reviewed-by: Jiewen Yao <jiewen.yao@intel.com>
Tested-by: Laszlo Ersek <lersek@redhat.com>
Platform can configure the PCD statically or dynamically
to control if ACPI S3 will be enabled.
S3 related modules can consume the PCD to control the code.
Cc: Feng Tian <feng.tian@intel.com>
Cc: Jiewen Yao <jiewen.yao@intel.com>
Cc: Laszlo Ersek <lersek@redhat.com>
Contributed-under: TianoCore Contribution Agreement 1.0
Signed-off-by: Star Zeng <star.zeng@intel.com>
Reviewed-by: Jiewen Yao <jiewen.yao@intel.com>
Tested-by: Laszlo Ersek <lersek@redhat.com>
This stack includes:
1. Dxe phase support by:
1) SdMmcPciHcDxe driver to consume PciIo and produce
SdMmcPassThru.
2) SdDxe driver to consume SdMmcPassThru to produce
BlkIo1/BlkIo2.
3) EmmcDxe driver to consume SdMmcPassThru to produce
BlkIo1/BlkIo2/SSP.
2. Pei phase support
1) SdBlockIoPei driver to consume SdMmcHostController
Ppi and produce VirutalBlkIo1&2.
2) EmmcBlockIoPei driver to consume SdMmcHostController
Ppi and produce VirutalBlkIo1&2.
3) SdMmcPciHcPei driver to produce SdMmcHostController
Ppi.
Contributed-under: TianoCore Contribution Agreement 1.0
Signed-off-by: Feng Tian <feng.tian@intel.com>
Reviewed-by: Hao Wu <hao.a.wu@intel.com>
The maximum number of PEI performance log entries is 255.
Add a new PCD, PcdMaxPeiPerformanceLogEntries16, to increase the maximum
number of PEI performance log entries.
Contributed-under: TianoCore Contribution Agreement 1.0
Signed-off-by: Cinnamon Shia <cinnamon.shia@hpe.com>
Reviewed-by: Samer EL-Haj-Mahmoud <elhaj@hpe.com>
Reviewed-by: Joseph Shifflett <joseph.shifflett@hpe.com>
Reviewed-by: Michael Kinney <michael.d.kinney@intel.com>
Reviewed-by: Star Zeng <star.zeng@intel.com>
This feature is aimed to allow OS make use of the HII database
during runtime. In this case, the contents of the HII Database
is exported to a buffer. The pointer to the buffer is placed
in the EFI System Configuration Table, where it can be retrieved
by an OS application.
Cc: Liming Gao <liming.gao@intel.com>
Cc: Eric Dong <eric.dong@intel.com>
Cc: Brian J. Johnson <bjohnson@sgi.com>
Cc: Andrew Fish <afish@apple.com>
Cc: El-Haj-Mahmoud Samer <samer.el-haj-mahmoud@hpe.com>
Contributed-under: TianoCore Contribution Agreement 1.0
Signed-off-by: Dandan Bi <dandan.bi@intel.com>
Reviewed-by: Liming Gao <liming.gao@intel.com>
Reviewed-by: Eric Dong <eric.dong@intel.com>
The RamDiskDxe driver will:
1. Produce the EFI RAM Disk Protocol
2. Install RAM disk device path and block I/O related protocols on the
RAM disk device handle.
3. Install RAM disk configuration form to HII database
Contributed-under: TianoCore Contribution Agreement 1.0
Signed-off-by: Hao Wu <hao.a.wu@intel.com>
Reviewed-by: Samer El-Haj-Mahmoud <elhaj@hpe.com>
Reviewed-by: Feng Tian <feng.tian@intel.com>
AARCH64 systems never require compatibility with legacy ACPI OSes, and
may not have any 32-bit addressable system RAM. To support ACPI on these
systems, we need to be able to relax the 4 GB allocation restriction.
So add a PCD PcdAcpiExposedTableVersions containing a bitmask describing
which ACPI versions are targeted, and wire it up it up to the memory
allocation calls in AcpiTableDxe/AcpiTableProtocol.c. I.e., if ACPI v1.0b
is not among the supported versions, the memory allocations are not limited
to 4 GB, and only table types that carry 64-bit addresses are emitted.
Note that this will inhibit the publishing of any tables that carry only
32-bit addresses, i.e., RSDPv1, RSDTv1 and RSDTv3.
Contributed-under: TianoCore Contribution Agreement 1.0
Signed-off-by: Ard Biesheuvel <ard.biesheuvel@linaro.org>
Reviewed-by: "Yao, Jiewen" <jiewen.yao@intel.com>
Reviewed-by: Star Zeng <star.zeng@intel.com>
FALSE
UEFI2.6 specification does not recommend to use BIT0
attribute for PropertiesTable, so we change default
value to FALSE.
Contributed-under: TianoCore Contribution Agreement 1.0
Signed-off-by: "Yao, Jiewen" <jiewen.yao@intel.com>
Reviewed-by: "Gao, Liming" <liming.gao@intel.com>
Reviewed-by: "Ard Biesheuvel" <ard.biesheuvel@linaro.org>
Reviewed-by: "Laszlo Ersek" <lersek@redhat.com>
PciHostBridgeDxe driver needs PciHostBridgeLib implemented by platform
to provide the root bridge related information and may call into
PciHostBridgeLib when resource conflicts happen.
Contributed-under: TianoCore Contribution Agreement 1.0
Signed-off-by: Ruiyu Ni <ruiyu.ni@intel.com>
Reviewed-by: Feng Tian <feng.tian@intel.com>
git-svn-id: https://svn.code.sf.net/p/edk2/code/trunk/edk2@19655 6f19259b-4bc3-4df7-8a09-765794883524
White space clean up for MdeModulePkg.dec
Contributed-under: TianoCore Contribution Agreement 1.0
Signed-off-by: Daocheng Bu <daocheng.bu@intel.com>
Reviewed-by: Liming Gao <liming.gao@intel.com>
git-svn-id: https://svn.code.sf.net/p/edk2/code/trunk/edk2@19486 6f19259b-4bc3-4df7-8a09-765794883524
Add IpmiLib and Ppi/Protocol header file. Update dec file
for new IpmiLib and Ppi/Protocol header file.
In V5,change for coding style.
Contributed-under: TianoCore Contribution Agreement 1.0
Signed-off-by: Daocheng Bu <daocheng.bu@intel.com>
Reviewed-by: Liming Gao <liming.gao@intel.com>
git-svn-id: https://svn.code.sf.net/p/edk2/code/trunk/edk2@19485 6f19259b-4bc3-4df7-8a09-765794883524
Add clarification for PcdAcpiDefaultOemTableId, PcdAcpiDefaultOemRevision,
PcdAcpiDefaultCreatorId, PcdAcpiDefaultCreatorRevision.
According to ACPI spec, they are used as special meaning for SSDT,
so we ignore them in updating generic SSDT provided by EDKII.
Contributed-under: TianoCore Contribution Agreement 1.0
Signed-off-by: "Yao, Jiewen" <jiewen.yao@intel.com>
Reviewed-by: "Zeng, Star" <star.zeng@intel.com>com>
git-svn-id: https://svn.code.sf.net/p/edk2/code/trunk/edk2@19321 6f19259b-4bc3-4df7-8a09-765794883524
PciSioSerialDxe driver can manages UARTs on a SIO chip or a PCI/PCIE
card.
It manages the SIO instance whose last device path node is a ACPI
device path and the HID in the ACPI device path node equals to
EISA_PNP_ID (0x501).
It also manages the PCI IO instance whose class code is 7/0/2 (16550
UART). But when proper value is set to PcdPciSerialParameters, the
driver can also manage non-standard PCI serial cards by matching
the Vendor ID and Device ID specified in PcdPciSerialParameters.
The PCI BAR index, IO/MMIO offset, register stride, clock rate can
also be specified through the same PCD.
Contributed-under: TianoCore Contribution Agreement 1.0
Signed-off-by: Ruiyu Ni <ruiyu.ni@intel.com>
Reviewed-by: Feng Tian <feng.tian@intel.com>
Reviewed-by: Michael Kinney <michael.d.kinney@intel.com>
git-svn-id: https://svn.code.sf.net/p/edk2/code/trunk/edk2@19179 6f19259b-4bc3-4df7-8a09-765794883524
Split the boot manager library from UiApp in MdeModulePkg/Application
and put the library in MdeModulePkg/Library.
Contributed-under: TianoCore Contribution Agreement 1.0
Signed-off-by: Dandan Bi <dandan.bi@intel.com>
Reviewed-by: Eric Dong <eric.dong@intel.com>
Reviewed-by: Liming Gao <liming.gao@intel.com>
git-svn-id: https://svn.code.sf.net/p/edk2/code/trunk/edk2@18921 6f19259b-4bc3-4df7-8a09-765794883524
This driver produces file explorer protocol layered on top of the FileExplorerLib.
Contributed-under: TianoCore Contribution Agreement 1.0
Signed-off-by: Eric Dong <eric.dong@intel.com>
Reviewed-by: Liming Gao <liming.gao@intel.com>
Reviewed-by: Samer El-Haj-Mahmoud <elhaj@hpe.com>
git-svn-id: https://svn.code.sf.net/p/edk2/code/trunk/edk2@18918 6f19259b-4bc3-4df7-8a09-765794883524
Jiewen Yao
Tian, Feng
Ard Biesheuvel
Song, BinX
Bi, Dandan
Leo Duran
Hao Wu
Star Zeng
Pete Batard
Ruiyu Ni
Liming Gao
Gary Li
Cinnamon Shia
Daocheng Bu
Eric Dong