rebase the image which only has .code section, but no other section, the
tool return error. this patch fix this bug to support it.
Cc: Liming Gao <liming.gao@intel.com>
Contributed-under: TianoCore Contribution Agreement 1.0
Signed-off-by: Yonghong Zhu <yonghong.zhu@intel.com>
Reviewed-by: Liming Gao <liming.gao@intel.com>
current GenFw rebase the image which only has .code section, but no other
section, the tool return error. this patch fix this bug to support it.
Cc: Liming Gao <liming.gao@intel.com>
Contributed-under: TianoCore Contribution Agreement 1.0
Signed-off-by: Yonghong Zhu <yonghong.zhu@intel.com>
Reviewed-by: Liming Gao <liming.gao@intel.com>
VolInfo Tool add new option --hash to use openssl to generate hash value
for each PE image. If the image base address is not zero, we will rebase
its base address to zero before generate hash value.
Contributed-under: TianoCore Contribution Agreement 1.0
Signed-off-by: Yonghong Zhu <yonghong.zhu@intel.com>
Reviewed-by: Liming Gao <liming.gao@intel.com>
Instead of only handling SEC Core or PEI Core instances in the outer FV,
the GenFv tool will now recurse into FV image FFS files to look for instances
in encapsulated FVs so the vector area can be updated appropriately.
Contributed-under: TianoCore Contribution Agreement 1.0
Signed-off-by: Eugene Cohen <eugene@hp.com>
Reviewed-by: Liming Gao <liming.gao@intel.com>
There are no functional changes in this patch. fixing the format base on
last commit.
The only change is 1) add back the blank line, which can help we better
compare with the original LZMA source code. 2) remove the indent of
#ifndef and #endif.
Contributed-under: TianoCore Contribution Agreement 1.0
Signed-off-by: Yonghong Zhu <yonghong.zhu@intel.com>
Reviewed-by: Liming Gao <liming.gao@intel.com>
when make BaseTools by VS2013, LzmaEnc.c report warning C4127:
conditional expression is constant, so this patch fix this issue.
Contributed-under: TianoCore Contribution Agreement 1.0
Signed-off-by: Yonghong Zhu <yonghong.zhu@intel.com>
Reviewed-by: Liming Gao <liming.gao@intel.com>
The way the first use of the "_maxMode" variable is commented out (i.e.,
together with the enclosing "if" statement) in GetOptimum() triggers the
"misleading-indentation" warning that is new in gcc-6.0, for the block of
code that originally depended on the "if" statement. Gcc believes
(mistakenly) that the programmer believes (mistakenly) that the block
depends on (repIndex == 0) higher up.
Restore the if statement, with a controlling expression that comprises the
constant 1 and "_maxMode" commented out.
Cc: Jordan Justen <jordan.l.justen@intel.com>
Cc: Cole Robinson <crobinso@redhat.com>
Cc: Liming Gao <liming.gao@intel.com>
Cc: Yonghong Zhu <yonghong.zhu@intel.com>
Reported-by: Cole Robinson <crobinso@redhat.com>
Suggested-by: Jordan Justen <jordan.l.justen@intel.com>
Build-tested-by: Cole Robinson <crobinso@redhat.com>
Ref: https://bugzilla.redhat.com/show_bug.cgi?id=1307439
Contributed-under: TianoCore Contribution Agreement 1.0
Signed-off-by: Laszlo Ersek <lersek@redhat.com>
Reviewed-by: Jordan Justen <jordan.l.justen@intel.com>
Reviewed-by: Liming Gao <liming.gao@intel.com>
The Help information provided by VolInfo does not follow the EDK II Tools
Design doc, so this patch update the help text and add the generic
options: -d, -v, -q, -s.
Contributed-under: TianoCore Contribution Agreement 1.0
Signed-off-by: Yonghong Zhu <yonghong.zhu@intel.com>
Reviewed-by: Liming Gao <liming.gao@intel.com>
current GCC build report error: 'for' loop initial declarations are only
allowed in C99 or C11 mode, the patch fix this failure.
Contributed-under: TianoCore Contribution Agreement 1.0
Signed-off-by: Yonghong Zhu <yonghong.zhu@intel.com>
Reviewed-by: Liming Gao <liming.gao@intel.com>
This patch revises multiple diagnostic messages to use correct
datatypes. It also checks that a symbol name that is about to be used
in a diagnostic message is terminated by a null character within the
contents of the string table section so that the print routine does
not read past the end of the string table section contents when
reading the symbol name.
Contributed-under: TianoCore Contribution Agreement 1.0
Signed-off-by: Michael LeMay <michael.lemay@intel.com>
Reviewed-by: Yonghong Zhu <yonghong.zhu@intel.com>
This patch expands the error message that is output when GenFw
encounters a bad symbol definition or an unsupported symbol type. It
displays the symbol name, the symbol address, and a message that
describes both possibilities (bad symbol definition or unsupported
symbol type). It also provides two examples of unsupported symbol
types.
Furthermore, this patch revises the conditional for detecting bad
symbol definitions to eliminate a redundant test (a Sym->st_shndx
value of SHN_ABS should certainly be greater than mEhdr->e_shnum) and
to change another test from 'Sym->st_shndx > mEhdr->e_shnum' to
'Sym->st_shndx >= mEhdr->e_shnum' for consistency with the test in
GetShdrByIndex.
Contributed-under: TianoCore Contribution Agreement 1.0
Signed-off-by: Michael LeMay <michael.lemay@intel.com>
Reviewed-by: Yonghong Zhu <yonghong.zhu@intel.com>
This patch revises GetPhdrByIndex and GetShdrByIndex to cause GenFw to
exit with an error message when a section header lookup fails. The
current behavior of those functions in such circumstances is to return
NULL, which can cause GenFw to subsequently fault when it attempts to
dereference the null pointer.
Contributed-under: TianoCore Contribution Agreement 1.0
Signed-off-by: Michael LeMay <michael.lemay@intel.com>
Reviewed-by: Yonghong Zhu <yonghong.zhu@intel.com>
Standardize the --version and --help text command-line options
Updated tools to correctly display the Build number when using command-line
option --version and exit successfully after termination.
Ecc was also updated to print informational messages after the options are
parsed.
Contributed-under: TianoCore Contribution Agreement 1.0
Signed-off-by: Larry Hauch <larry.hauch@intel.com>
Reviewed-by: Erik Bjorge <erik.c.bjorge@intel.com>
This adds support to the ELF to PE/COFF conversion performed by GenFw for
the AArch64 ELF relocation types R_AARCH64_PREL64, R_AARCH64_PREL32 and
R_AARCH64_PREL16. Since we already require the ELF and PE/COFF section
layouts to be identical in order to support other relative relocation
types, this is simply a matter of whitelisting these new relocation types
in the same way.
While we're at it, clean up the code a bit, and add a comment explaining
why these relocations are ignored in WriteRelocations64 ().
Contributed-under: TianoCore Contribution Agreement 1.0
Signed-off-by: Ard Biesheuvel <ard.biesheuvel@linaro.org>
Reviewed-by: Leif Lindholm <leif.lindholm@linaro.org>
Reviewed-by: Liming Gao <liming.gao@intel.com>
Unlike GNU ld, which can be instructed to emit symbol based static
relocations into fully linked binaries using the --emit-relocs command
line switch, the RVCT armlink tool can only emit dynamic relocations
into the PT_DYNAMIC segment.
This has two consequences
. we can only identify absolute relocations, so there is no way to fix
up relative relocations between sections, or check their validity in
the PE/COFF layout
. the r_offset fields of the PT_DYNAMIC DT_REL entries are relative
either to the base of the image or to any of its segments but *not* to
the base of the input section that contains the location they refer
to, and converting them to PE/COFF image offsets is non-trivial unless
the sections are laid out in the same way in the ELF and PE/COFF
versions of the binary.
There is really only one way to deal with this, and that is to require
that the ELF and PE/COFF versions of the binary are identical in memory.
So enforce that in the code.
Also, fix the utterly broken relocation fixup code that dereferences
ELF32_R_SYM(r_info) both as a 1-based program header index and a 0-based
section header index. If this code ever produced working binaries, it
was purely by chance.
Contributed-under: TianoCore Contribution Agreement 1.0
Signed-off-by: Ard Biesheuvel <ard.biesheuvel@linaro.org>
Reviewed-by: Liming Gao <liming.gao@intel.com>
git-svn-id: https://svn.code.sf.net/p/edk2/code/trunk/edk2@19236 6f19259b-4bc3-4df7-8a09-765794883524
When two vtf files in one FV image, no FV file can be generated, but it
report the stack trace info. so we enhance the tool to report error
message directly but not the stack trace info.
Contributed-under: TianoCore Contribution Agreement 1.0
Signed-off-by: Yonghong Zhu <yonghong.zhu@intel.com>
Reviewed-by: Liming Gao <liming.gao@intel.com>
git-svn-id: https://svn.code.sf.net/p/edk2/code/trunk/edk2@19141 6f19259b-4bc3-4df7-8a09-765794883524
When two vtf files in one FV image, no FV file can be generated, but it
report the stack trace info. so we enhance the tool to report error
message directly but not the stack trace info.
Contributed-under: TianoCore Contribution Agreement 1.0
Signed-off-by: Yonghong Zhu <yonghong.zhu@intel.com>
Reviewed-by: Liming Gao <liming.gao@intel.com>
git-svn-id: https://svn.code.sf.net/p/edk2/code/trunk/edk2@19137 6f19259b-4bc3-4df7-8a09-765794883524
R_ARM_REL32 are relative relocations, so we don't need to do anything
special when performing the ELF to PE/COFF conversion, since our memory
layout is identical between the two binary formats. So just allow them.
Contributed-under: TianoCore Contribution Agreement 1.0
Signed-off-by: Ard Biesheuvel <ard.biesheuvel@linaro.org>
Reviewed-by: Liming Gao <liming.gao@intel.com>
git-svn-id: https://svn.code.sf.net/p/edk2/code/trunk/edk2@18931 6f19259b-4bc3-4df7-8a09-765794883524
when we make BaseTools, it report warnings about VfrError.cpp and VolInfo,
so this patch fix this warning.
Contributed-under: TianoCore Contribution Agreement 1.0
Signed-off-by: Yonghong Zhu <yonghong.zhu@intel.com>
Reviewed-by: Liming Gao <liming.gao@intel.com>
git-svn-id: https://svn.code.sf.net/p/edk2/code/trunk/edk2@18851 6f19259b-4bc3-4df7-8a09-765794883524
Add new option --keepoptionalheader and that flag does not zero PE/COFF
optional header fields including the version fields. It can support the
case that the PE/COFF optional header would be kept.
Contributed-under: TianoCore Contribution Agreement 1.0
Signed-off-by: Yonghong Zhu <yonghong.zhu@intel.com>
Reviewed-by: Liming Gao <liming.gao@intel.com>
git-svn-id: https://svn.code.sf.net/p/edk2/code/trunk/edk2@18767 6f19259b-4bc3-4df7-8a09-765794883524
when the absolute path is given to '-f', it would create some redundant
empty directories.
Contributed-under: TianoCore Contribution Agreement 1.0
Signed-off-by: Yonghong Zhu <yonghong.zhu@intel.com>
Reviewed-by: Hao Wu <hao.a.wu@intel.com>
git-svn-id: https://svn.code.sf.net/p/edk2/code/trunk/edk2@18675 6f19259b-4bc3-4df7-8a09-765794883524
Current grammar for suppressif opcode not consistent in statement and option case, this patch fixed this issue. The same case also existed for other condition opcodes.
Contributed-under: TianoCore Contribution Agreement 1.0
Signed-off-by: Eric Dong <eric.dong@intel.com>
Reviewed-by: Liming Gao <liming.gao@intel.com>
git-svn-id: https://svn.code.sf.net/p/edk2/code/trunk/edk2@18606 6f19259b-4bc3-4df7-8a09-765794883524
The handling of ARM MOVW/MOVT relocations sets the FixupData twice (once
incorrectly), but fails to advance the *FixupData pointer afterwards.
This is not actually a problem, since the fixup data is never used but
let's fix it anyway in case anyone reuses this code.
Contributed-under: TianoCore Contribution Agreement 1.0
Signed-off-by: Ard Biesheuvel <ard.biesheuvel@linaro.org>
Reviewed-by: Leif Lindholm <leif.lindholm@linaro.org>
Reviewed-by: Liming Gao <liming.gao@intel.com>
git-svn-id: https://svn.code.sf.net/p/edk2/code/trunk/edk2@18596 6f19259b-4bc3-4df7-8a09-765794883524
Disable the RVCT size optimization that may put sections at an offset
that is not aligned to their own alignment, by adding the --no_legacyalign
switch to the RVCT linker command line. This is necessary since such sections
cannot be correctly converted into PE/COFF sections without padding them at
the front, which defeats the purpose of the optimization anyway.
With the optimization gone, we can also remove the special case for ARM in
GenFw that could result in corrupt PE/COFF images to be emitted. Instead,
sections whose base address is not aligned correctly are outright rejected.
Contributed-under: TianoCore Contribution Agreement 1.0
Signed-off-by: Ard Biesheuvel <ard.biesheuvel@linaro.org>
Reviewed-by: Leif Lindholm <leif.lindholm@linaro.org>
git-svn-id: https://svn.code.sf.net/p/edk2/code/trunk/edk2@18540 6f19259b-4bc3-4df7-8a09-765794883524
ARM and RVCT apply to 32-bit code only, so remove any references
to them (including the workaround for the linker) from the 64-bit
version of ElfConvert.c
Contributed-under: TianoCore Contribution Agreement 1.0
Signed-off-by: Ard Biesheuvel <ard.biesheuvel@linaro.org>
Reviewed-by: Leif Lindholm <leif.lindholm@linaro.org>
git-svn-id: https://svn.code.sf.net/p/edk2/code/trunk/edk2@18539 6f19259b-4bc3-4df7-8a09-765794883524
SVN commit r18077 ("BaseTools/GenFw: move .debug contents to .data to
save space") removed the separate .debug section after moving its
contents into .text or .data. However, this change does not take into
account that some of these contents need to appear at a 32-bit aligned
offset. So align the debug data RVA to 32 bits.
Contributed-under: TianoCore Contribution Agreement 1.0
Signed-off-by: Ard Biesheuvel <ard.biesheuvel@linaro.org>
Reviewed-by: Liming Gao <liming.gao@intel.com>
git-svn-id: https://svn.code.sf.net/p/edk2/code/trunk/edk2@18443 6f19259b-4bc3-4df7-8a09-765794883524
for FFS data above 16 bytes alignment requirement.
PI spec requires FFS header to be at 8 bytes alignment to FV header.
And, FFS data alignment requires the beginning of the file data must
be aligned on a particular boundary, such as 1, 16, 128 bytes or above.
If FFS data alignment requires to be above 16 bytes, and FFS header
must be at 8 byte alignment, so FFS header size must be multiple of 8.
Contributed-under: TianoCore Contribution Agreement 1.0
Signed-off-by: Star Zeng <star.zeng@intel.com>
Reviewed-by: Liming Gao <liming.gao@intel.com>
git-svn-id: https://svn.code.sf.net/p/edk2/code/trunk/edk2@18262 6f19259b-4bc3-4df7-8a09-765794883524
Add auto detection for the ARCH variable for AARCH64 and ARM
systems. This allows us to do a native build of the BaseTools
without the need to set ARCH externally.
Contributed-under: TianoCore Contribution Agreement 1.0
Signed-off-by: Ard Biesheuvel <ard.biesheuvel@linaro.org>
Reviewed-by: Liming Gao <liming.gao@intel.com>
git-svn-id: https://svn.code.sf.net/p/edk2/code/trunk/edk2@18206 6f19259b-4bc3-4df7-8a09-765794883524
The AArch64 small C model makes extensive use of ADRP/ADD and
ADRP/{LDR,STR} pairs to emit PC-relative symbol references with
a +/- 4 GB range. Since the relocation pair splits the relative
offset into a relative page offset and an absolute offset into
a 4 KB page, we need to take extra care to ensure that the target
of the relocation preserves its alignment relative to a 4 KB
alignment boundary.
Also, due to a problem with the --emit-relocs GNU ld option, where
it does not recalculate the addends for section relative relocations,
the only way to guarantee correct code is by requiring the relative
section offset to be equal in the ELF and PE/COFF versions of the
binary. This affects both the 'tiny' and 'small' GCC code models.
Contributed-under: TianoCore Contribution Agreement 1.0
Signed-off-by: Ard Biesheuvel <ard.biesheuvel@linaro.org>
Reviewed-by: Leif Lindholm <leif.lindholm@linaro.org>
Tested-by: Leif Lindholm <leif.lindholm@linaro.org>
Reviewed-by: Liming Gao <liming.gao@intel.com>
git-svn-id: https://svn.code.sf.net/p/edk2/code/trunk/edk2@18197 6f19259b-4bc3-4df7-8a09-765794883524
To prevent double padding of XIP modules leading to excessive
waste of FV space, try to adjust existing padding rather than
adding more.
Instead of adding a pad file to the FV to line up an FFS file that
itself may contain padding to line up the payload, try to find a
dedicated padding section inside the FFS, and reduce its size to
place all subsequent aligned FFS section at their respective minimum
alignments.
When using 4 KB section alignment (which is required on AARCH64 in
some cases), this will save 4 KB for each XIP module.
Contributed-under: TianoCore Contribution Agreement 1.0
Signed-off-by: Ard Biesheuvel <ard.biesheuvel@linaro.org>
Reviewed-by: Liming Gao <liming.gao@intel.com>
Reviewed-by: Yingke Liu <yingke.d.liu@intel.com>
git-svn-id: https://svn.code.sf.net/p/edk2/code/trunk/edk2@18080 6f19259b-4bc3-4df7-8a09-765794883524
Instead of using an anonymous section of type EFI_SECTION_RAW to pad
out the first aligned FFS section to its required alignment, use a
section with a dedicated GUID if the size of the padding permits it.
This allows for more flexibility when placing such FFS images in a
firmware volume, because we will now be able to remove padding rather
than add more, by shrinking the size of this section instead of
padding out the start of the FFS image to file alignment.
Contributed-under: TianoCore Contribution Agreement 1.0
Signed-off-by: Ard Biesheuvel <ard.biesheuvel@linaro.org>
Reviewed-by: Liming Gao <liming.gao@intel.com>
Reviewed-by: Yingke Liu <yingke.d.liu@intel.com>
git-svn-id: https://svn.code.sf.net/p/edk2/code/trunk/edk2@18079 6f19259b-4bc3-4df7-8a09-765794883524
The secondary header (not the DOS header) of a PE/COFF binary
does not reside at a fixed offset. Instead, its offset into the
file is recorded in the DOS header.
This gives us the flexibility to move it, along with the section
headers, to right before the first section if there is considerable
space before it, i.e., when the PE/COFF file alignment is substantially
larger than the size of the header.
Since the PE/COFF to TE conversion replaces everything before the
section headers with a simple TE header, this change removes all
the header padding from such images, leading to smaller files.
Contributed-under: TianoCore Contribution Agreement 1.0
Signed-off-by: Ard Biesheuvel <ard.biesheuvel@linaro.org>
Reviewed-by: Liming Gao <liming.gao@intel.com>
Reviewed-by: Yingke Liu <yingke.d.liu@intel.com>
git-svn-id: https://svn.code.sf.net/p/edk2/code/trunk/edk2@18078 6f19259b-4bc3-4df7-8a09-765794883524
In order to reduce the memory footprint of PE/COFF images when
using large values for the PE/COFF section alignment, move the
contents of the .debug section to data, and point the debug data
directory entry to it. This allows us to drop the .debug section
entirely, as well as any associated rounding. Since our .debug
section only contains the filename of the ELF input image, the
penalty of keeping this data in a non-discardable section is
negligible.
Note that the PE/COFF spec v6.3 explicitly mentions that this is
allowed.
Contributed-under: TianoCore Contribution Agreement 1.0
Signed-off-by: Ard Biesheuvel <ard.biesheuvel@linaro.org>
Reviewed-by: Liming Gao <liming.gao@intel.com>
Reviewed-by: Yingke Liu <yingke.d.liu@intel.com>
git-svn-id: https://svn.code.sf.net/p/edk2/code/trunk/edk2@18077 6f19259b-4bc3-4df7-8a09-765794883524
ReadMemoryFileLine () appends a NULL character to the string
it returns, but it failed to account for it in the allocation.
Contributed-under: TianoCore Contribution Agreement 1.0
Signed-off-by: Ard Biesheuvel <ard.biesheuvel@linaro.org>
Reviewed-by: Yingke Liu <yingke.d.liu@intel.com>
Signed-off-by: Laszlo Ersek <lersek@redhat.com>
git-svn-id: https://svn.code.sf.net/p/edk2/code/trunk/edk2@18047 6f19259b-4bc3-4df7-8a09-765794883524
Relocations of type EFI_IMAGE_REL_BASED_DIR64 are handled in exactly
the same way on all 64-bit machine types (IPF, X64 and AARCH64).
So move the handling of this type to the generic part of the relocation
routine PeCoffLoaderRelocateImage ().
Contributed-under: TianoCore Contribution Agreement 1.0
Signed-off-by: Ard Biesheuvel <ard.biesheuvel@linaro.org>
Reviewed-by: Liming Gao <liming.gao@intel.com>
Reviewed-by: Yingke Liu <yingke.d.liu@intel.com>
git-svn-id: https://svn.code.sf.net/p/edk2/code/trunk/edk2@17942 6f19259b-4bc3-4df7-8a09-765794883524
On FreeBSD, uuid.h is in /usr/include, not /usr/include/uuid.
Fix some errors when building using clang caused by self-assignment: the
preferred way to 'use' a variable is '(void)x;', not 'x = x;'.
Where the system provides $(CC) etc. by default, don't override it to be gcc.
Contributed-under: TianoCore Contribution Agreement 1.0
Signed-off-by: Bruce Cran <bruce@cran.org.uk>
Reviewed-by: Yingke Liu <yingke.d.liu@intel.com>
git-svn-id: https://svn.code.sf.net/p/edk2/code/trunk/edk2@17866 6f19259b-4bc3-4df7-8a09-765794883524
Get maximum section alignment from each ELF section, and this alignment is used to create PE header.
Contributed-under: TianoCore Contribution Agreement 1.0
Signed-off-by: Ard Biesheuvel <ard.biesheuvel@linaro.org>
Reviewed-by: Liming Gao <liming.gao@intel.com>
git-svn-id: https://svn.code.sf.net/p/edk2/code/trunk/edk2@17727 6f19259b-4bc3-4df7-8a09-765794883524
Convert ".\\" to "", because it doesn't work with WINDOWS_EXTENSION_PATH.
WINDOWS_EXTENSION_PATH can support the file path larger than 260 length.
Contributed-under: TianoCore Contribution Agreement 1.0
Signed-off-by: Liming Gao <liming.gao@intel.com>
Reviewed-by: Yingke Liu <yingke.d.liu@intel.com>
git-svn-id: https://svn.code.sf.net/p/edk2/code/trunk/edk2@17686 6f19259b-4bc3-4df7-8a09-765794883524