Zero-sized extents should not be cached nor considered valid, as they
have no meaning. As such, reject them outright when caching extents.
This makes it so callers do not need to check for ee_len = 0 before
using the result, which, if not done, can result in possible infinite
loops.
Cc: Marvin Häuser <mhaeuser@posteo.de>
Fixes: d9ceedca6c8f ("Ext4Pkg: Add Ext4Dxe driver.")
Reported-by: Savva Mitrofanov <savvamtr@gmail.com>
Signed-off-by: Pedro Falcato <pedro.falcato@gmail.com>
Doesn't take into account the empty checksum field and passes the correct initial value of 0xFFFF into the CRC16-ANSI function
Signed-off-by: Savva Mitrofanov <savvamtr@gmail.com>
The ANSI implementation assumes that initial value should be 0xFFFF and
the result shouldn't be inverted
Fixes: 92288f4 ("MdePkg/BaseLib: Add CRC16-ANSI and CRC32c implementations")
Signed-off-by: Savva Mitrofanov <savvamtr@gmail.com>
BZ: https://bugzilla.tianocore.org/show_bug.cgi?id=3223
In the current design, memory protection is not available till CpuDxe
is loaded. To resolve this, introduce CpuArchLib to move the
CPU Architectural initialization to DxeCore.
Cc: Eric Dong <eric.dong@intel.com>
Cc: Ray Ni <ray.ni@intel.com>
Cc: Laszlo Ersek <lersek@redhat.com>
Cc: Rahul Kumar <rahul1.kumar@intel.com>
Cc: Vitaly Cheptsov <vit9696@protonmail.com>
Signed-off-by: Marvin Häuser <mhaeuser@posteo.de>
The PcdPrePiProduceMemoryTypeInformationHob on ARM breaks Linux efistub
boot. The efistub for arm32 uncompresses Linux kernel into memory ranges
which occupied by DXE-phase drivers which leads to
'permission denied'-error during page write. So as a temporary solution
we use PcdPrePiProduceMemoryTypeInformationHob only for AARCH64
Signed-off-by: Savva Mitrofanov <savvamtr@gmail.com>
This change removes Xcode5ExceptionHandlerAsm and merge it's
functionality into ExceptionHandlerAsm.
Also decreases number of vectors to 32 for:
- 64-bit PeiCpuExceptionHandlerLib
- 32-bit PeiCpuExceptionHandlerLib, SecPeiCpuExceptionHandlerLib
Signed-off-by: Savva Mitrofanov <savvamtr@gmail.com>
