Commit Graph

28 Commits

Author SHA1 Message Date
Ma, Maurice 4c9ed23eb6 Add UINT16/32/64 array and DSC include support.
Contributed-under: TianoCore Contribution Agreement 1.0
Signed-off-by: "Ma, Maurice" <maurice.ma@intel.com>
Reviewed-by: "Yao, Jiewen" <jiewen.yao@intel.com>


git-svn-id: https://svn.code.sf.net/p/edk2/code/trunk/edk2@17003 6f19259b-4bc3-4df7-8a09-765794883524
2015-03-04 01:03:20 +00:00
Yao, Jiewen c0a8cf34f6 Fix build error.
Contributed-under: TianoCore Contribution Agreement 1.0
Signed-off-by: "Yao, Jiewen" <jiewen.yao@intel.com>


git-svn-id: https://svn.code.sf.net/p/edk2/code/trunk/edk2@16863 6f19259b-4bc3-4df7-8a09-765794883524
2015-02-13 06:17:23 +00:00
Yao, Jiewen 1c54ceb705 Fix comments error.
Contributed-under: TianoCore Contribution Agreement 1.0
Signed-off-by: "Yao, Jiewen" <jiewen.yao@intel.com>
Reviewed-by: "Rangarajan, Ravi P" <ravi.p.rangarajan@intel.com>
Reviewed-by: "Ma, Maurice" <maurice.ma@intel.com>


git-svn-id: https://svn.code.sf.net/p/edk2/code/trunk/edk2@16845 6f19259b-4bc3-4df7-8a09-765794883524
2015-02-13 01:20:35 +00:00
Yao, Jiewen 6ca9135a65 Fix comments format error.Fsp1.1 update.
Contributed-under: TianoCore Contribution Agreement 1.0
Signed-off-by: "Yao, Jiewen" <jiewen.yao@intel.com>



git-svn-id: https://svn.code.sf.net/p/edk2/code/trunk/edk2@16843 6f19259b-4bc3-4df7-8a09-765794883524
2015-02-12 15:13:37 +00:00
Yao, Jiewen c030e74c67 rename XXXDflt to XXXDefault (expand for better readability)
Contributed-under: TianoCore Contribution Agreement 1.0
Signed-off-by: "Yao, Jiewen" <jiewen.yao@intel.com>
Reviewed-by: "Mudusuru, Giri P" <giri.p.mudusuru@intel.com>



git-svn-id: https://svn.code.sf.net/p/edk2/code/trunk/edk2@16835 6f19259b-4bc3-4df7-8a09-765794883524
2015-02-12 07:37:30 +00:00
Yao, Jiewen 95c95ac0ef Fsp1.1 update.
Update ApiEntry.asm to use MACRO instead of direct XMM access.
Add sanity parameter check for FSP API.
Add sanity return code check for internal API.
Call LoadUcode before CarInit to meet silicon requirement.
Remove unnecessary VpdBase for PatchTable.
Add ASSERT for NULL check FSP1.1 entrypoint.

Contributed-under: TianoCore Contribution Agreement 1.0
Signed-off-by: "Yao, Jiewen" <jiewen.yao@intel.com>
Reviewed-by: "Rangarajan, Ravi P" <ravi.p.rangarajan@intel.com>
Reviewed-by: "Ma, Maurice" <maurice.ma@intel.com>
Reviewed-by: "Mudusuru, Giri P" <giri.p.mudusuru@intel.com>



git-svn-id: https://svn.code.sf.net/p/edk2/code/trunk/edk2@16834 6f19259b-4bc3-4df7-8a09-765794883524
2015-02-12 07:02:43 +00:00
Yao, Jiewen d5fb1edfb1 Update IntelFspPkg according to FSP1.1.
Contributed-under: TianoCore Contribution Agreement 1.0
Signed-off-by: "Yao, Jiewen" <jiewen.yao@intel.com>
Reviewed-by: "Rangarajan, Ravi P" <ravi.p.rangarajan@intel.com>


git-svn-id: https://svn.code.sf.net/p/edk2/code/trunk/edk2@16825 6f19259b-4bc3-4df7-8a09-765794883524
2015-02-11 02:57:40 +00:00
Liming Gao f3b5686f7e IntelFspPkg: Update BaseFspDebugLibSerialPort library
Implement new API DebugPrintLevelEnabled() to base on PCD PcdFixedDebugPrintErrorLevel.

Contributed-under: TianoCore Contribution Agreement 1.0
Signed-off-by: Liming Gao <liming.gao@intel.com>
Reviewed-by: Star Zeng <star.zeng@intel.com>

git-svn-id: https://svn.code.sf.net/p/edk2/code/trunk/edk2@16795 6f19259b-4bc3-4df7-8a09-765794883524
2015-02-06 06:37:55 +00:00
Jordan Justen 3f3c4895da */Contributions.txt: Update example email address
Use the example.com domain as recommended in RFC 2606.

NOTE: This does not modify the wording of the "TianoCore Contribution
      Agreement 1.0" section

Contributed-under: TianoCore Contribution Agreement 1.0
Signed-off-by: Jordan Justen <jordan.l.justen@intel.com>
Reviewed-by: Bruce Cran <bruce.cran@gmail.com>

git-svn-id: https://svn.code.sf.net/p/edk2/code/trunk/edk2@16724 6f19259b-4bc3-4df7-8a09-765794883524
2015-02-03 17:29:14 +00:00
Jordan Justen 252b22d965 IntelFsp*Pkg: Add Contributions.txt
This was copied from MdePkg.

Contributed-under: TianoCore Contribution Agreement 1.0
Signed-off-by: Jordan Justen <jordan.l.justen@intel.com>

git-svn-id: https://svn.code.sf.net/p/edk2/code/trunk/edk2@16721 6f19259b-4bc3-4df7-8a09-765794883524
2015-02-03 17:28:46 +00:00
Shumin Qiu b34eb19083 IntelFspPkg: Refine the format of meta data files.
Contributed-under: TianoCore Contribution Agreement 1.0
Signed-off-by: Shumin Qiu <shumin.qiu@intel.com>
Reviewed-by: Jiewen Yao <jiewen.yao@intel.com>



git-svn-id: https://svn.code.sf.net/p/edk2/code/trunk/edk2@16622 6f19259b-4bc3-4df7-8a09-765794883524
2015-01-19 07:18:24 +00:00
Yao, Jiewen baaacdc823 Move EndOfPei signal earlier before giving control back to FspInitDone.
Contributed-under: TianoCore Contribution Agreement 1.0
Signed-off-by: "Yao, Jiewen" <jiewen.yao@intel.com>
Reviewed-by: "Rangarajan, Ravi P" <ravi.p.rangarajan@intel.com>
Reviewed-by: "Ma, Maurice" <maurice.ma@intel.com>
Reviewed-by: "Mudusuru, Giri P" <giri.p.mudusuru@intel.com>

git-svn-id: https://svn.code.sf.net/p/edk2/code/trunk/edk2@16480 6f19259b-4bc3-4df7-8a09-765794883524
2014-12-06 01:05:19 +00:00
Yao, Jiewen 0b559c1a1d Added missing gFspBootLoaderTemporaryMemoryGuid to the FspPlatformLib.inf.
Contributed-under: TianoCore Contribution Agreement 1.0
Signed-off-by: "Yao, Jiewen" <jiewen.yao@intel.com>
Reviewed-by: "Rangarajan, Ravi P" <ravi.p.rangarajan@intel.com>
Reviewed-by: "Ma, Maurice" <maurice.ma@intel.com>
Reviewed-by: "Mudusuru, Giri P" <giri.p.mudusuru@intel.com>

git-svn-id: https://svn.code.sf.net/p/edk2/code/trunk/edk2@16479 6f19259b-4bc3-4df7-8a09-765794883524
2014-12-06 00:31:40 +00:00
Yao, Jiewen 975f1c6417 Updated FspApiEntry.asm/.s to auto detect the size of the MCU region.
Contributed-under: TianoCore Contribution Agreement 1.0
Signed-off-by: "Yao, Jiewen" <jiewen.yao@intel.com>
Reviewed-by: "Rangarajan, Ravi P" <ravi.p.rangarajan@intel.com>
Reviewed-by: "Ma, Maurice" <maurice.ma@intel.com>
Reviewed-by: "Mudusuru, Giri P" <giri.p.mudusuru@intel.com>

git-svn-id: https://svn.code.sf.net/p/edk2/code/trunk/edk2@16478 6f19259b-4bc3-4df7-8a09-765794883524
2014-12-06 00:29:04 +00:00
Yao, Jiewen 63c05743b4 Specify little-endian, and then use the “Standard size” from the chart.
Enhance python tool.
The default being native size (and alignment) means by default the standard sizes are not used, which might cause different behavior on difference compiler.

Contributed-under: TianoCore Contribution Agreement 1.0
Signed-off-by: "Yao, Jiewen" <jiewen.yao@intel.com>
Reviewed-by: "Andrew Fish" <afish@apple.com>


git-svn-id: https://svn.code.sf.net/p/edk2/code/trunk/edk2@16476 6f19259b-4bc3-4df7-8a09-765794883524
2014-12-05 00:28:11 +00:00
Yao, Jiewen 8e89d9ceeb Fix typo.
Contributed-under: TianoCore Contribution Agreement 1.0
Signed-off-by: "Yao, Jiewen" <jiewen.yao@intel.com>
Reviewed-by: "Rangarajan, Ravi P" <ravi.p.rangarajan@intel.com>
Reviewed-by: "Ma, Maurice" <maurice.ma@intel.com>
Reviewed-by: "Mudusuru, Giri P" <giri.p.mudusuru@intel.com>

git-svn-id: https://svn.code.sf.net/p/edk2/code/trunk/edk2@16475 6f19259b-4bc3-4df7-8a09-765794883524
2014-12-04 06:03:58 +00:00
Yao, Jiewen 59c30d7416 properly support GCC - pass 'I' (int) rather than 'L' (long) to struct.unpack.
Contributed-under: TianoCore Contribution Agreement 1.0
Signed-off-by: "Yao, Jiewen" <jiewen.yao@intel.com>
Reviewed-by: "Rangarajan, Ravi P" <ravi.p.rangarajan@intel.com>
Reviewed-by: "Ma, Maurice" <maurice.ma@intel.com>
Reviewed-by: "Mudusuru, Giri P" <giri.p.mudusuru@intel.com>

git-svn-id: https://svn.code.sf.net/p/edk2/code/trunk/edk2@16474 6f19259b-4bc3-4df7-8a09-765794883524
2014-12-04 06:01:15 +00:00
jyao1 90be222196 Fix an issue on FixedMtreProgramming - AND/OR mask incorrect.
Contributed-under: TianoCore Contribution Agreement 1.0

signed-off by: Yao, Jiewen <jiewen.yao@intel.com>
reviewed by: Rangarajan, Ravi P <ravi.p.rangarajan@intel.com>

git-svn-id: https://svn.code.sf.net/p/edk2/code/trunk/edk2@16181 6f19259b-4bc3-4df7-8a09-765794883524
2014-09-28 01:07:13 +00:00
Star Zeng b5fd61fe8c IntelFspPkg/IntelFspWrapperPkg: Fix some typos.
Contributed-under: TianoCore Contribution Agreement 1.0
Signed-off-by: Star Zeng <star.zeng@intel.com>
Reviewed-by: Jiewen Yao <jiewen.yao@intel.com>

git-svn-id: https://svn.code.sf.net/p/edk2/code/trunk/edk2@16040 6f19259b-4bc3-4df7-8a09-765794883524
2014-09-03 06:48:38 +00:00
Star Zeng fa7fadf78e IntelFspPkg BaseCacheLib: State CacheAsRamLib in its inf, because it consumes DisableCacheAsRam() that is the interface of CacheAsRamLib.
Contributed-under: TianoCore Contribution Agreement 1.0
Signed-off-by: Star Zeng <star.zeng@intel.com>
Reviewed-by: Jiewen Yao <jiewen.yao@intel.com>

git-svn-id: https://svn.code.sf.net/p/edk2/code/trunk/edk2@15877 6f19259b-4bc3-4df7-8a09-765794883524
2014-08-22 01:23:28 +00:00
jyao1 954894f270 Rollback file GUID change, because it is VTF file and GUID is predefined.
Contributed-under: TianoCore Contribution Agreement 1.0

Signed off by: Jiewen Yao <jiewen.yao@intel.com>
Reviewed by: Chris Li <chris.li@intel.com>



git-svn-id: https://svn.code.sf.net/p/edk2/code/trunk/edk2@15775 6f19259b-4bc3-4df7-8a09-765794883524
2014-08-08 02:15:41 +00:00
jyao1 8f9bafeea6 Correct AsciiStrnCpy.
Contributed-under: TianoCore Contribution Agreement 1.0

Signed off by: Jiewen Yao <jiewen.yao@intel.com>
Reviewed by: Eric Dong <eric.dong@intel.com>


git-svn-id: https://svn.code.sf.net/p/edk2/code/trunk/edk2@15772 6f19259b-4bc3-4df7-8a09-765794883524
2014-08-08 00:21:18 +00:00
jyao1 a81fcd30c1 Eliminate duplicated file GUID.
Eliminate duplicate GUID definition.
Do explicit data cast.
Use StrnCpy instead of StrCpy.
Update GCC assembly.

Contributed-under: TianoCore Contribution Agreement 1.0

Signed off by: Jiewen Yao <jiewen.yao@intel.com>
Reviewed by: Eric Dong <eric.dong@intel.com>
Reviewed by: Liming Gao <liming.gao@intel.com>


git-svn-id: https://svn.code.sf.net/p/edk2/code/trunk/edk2@15762 6f19259b-4bc3-4df7-8a09-765794883524
2014-08-06 13:27:14 +00:00
jyao1 5ce0e51851 Eliminate duplicated file GUID.
Contributed-under: TianoCore Contribution Agreement 1.0

Signed off by: Jiewen Yao <jiewen.yao@intel.com>
Reviewed by: Eric Dong <eric.dong@intel.com>


git-svn-id: https://svn.code.sf.net/p/edk2/code/trunk/edk2@15751 6f19259b-4bc3-4df7-8a09-765794883524
2014-08-05 03:59:56 +00:00
jyao1 4a00645100 Clean up code.
Contributed-under: TianoCore Contribution Agreement 1.0

Signed off by: Jiewen Yao <jiewen.yao@intel.com>
Reviewed by: Liming Gao <liming.gao@intel.com>


git-svn-id: https://svn.code.sf.net/p/edk2/code/trunk/edk2@15744 6f19259b-4bc3-4df7-8a09-765794883524
2014-08-04 08:24:27 +00:00
jyao1 a0e0fb6d9f Clean up code.
Contributed-under: TianoCore Contribution Agreement 1.0

Signed off by: Jiewen Yao <jiewen.yao@intel.com>
Reviewed by: Eric Dong <eric.dong@intel.com>


git-svn-id: https://svn.code.sf.net/p/edk2/code/trunk/edk2@15743 6f19259b-4bc3-4df7-8a09-765794883524
2014-08-04 06:34:41 +00:00
jyao1 c8ec22a266 Add IntelFspPkg to support create FSP bin based on EDKII.
Contributed-under: TianoCore Contribution Agreement 1.0

Signed off by: Ravi Rangarajan <ravi.p.rangarajan@intel.com>
Reviewed by: Maurice Ma <maurice.ma@intel.com>
Reviewed by: Jiewen Yao <jiewen.yao@intel.com>
Reviewed by: Giri Mudusuru <giri.p.mudusuru@intel.com>
Reviewed by: Liming Gao <liming.gao@intel.com>


git-svn-id: https://svn.code.sf.net/p/edk2/code/trunk/edk2@15705 6f19259b-4bc3-4df7-8a09-765794883524
2014-07-29 02:21:52 +00:00
jyao1 a33a2f6221 Add IntelFspWrapper to support boot EDKII on FSP bin.
Contributed-under: TianoCore Contribution Agreement 1.0

Signed off by: Jiewen Yao <jiewen.yao@intel.com>
Reviewed by: Ravi Rangarajan <ravi.p.rangarajan@intel.com>
Reviewed by: Maurice Ma <maurice.ma@intel.com>
Reviewed by: Giri Mudusuru <giri.p.mudusuru@intel.com>
Reviewed by: Liming Gao <liming.gao@intel.com>


git-svn-id: https://svn.code.sf.net/p/edk2/code/trunk/edk2@15676 6f19259b-4bc3-4df7-8a09-765794883524
2014-07-24 06:52:43 +00:00