Move Cm Reference object from Arm Namespace to the Arch
Common namespace.
Correspondingly also update the following modules to reflect the
changes introduced by the move:
- PPTT generator
- SSDT CPU topology generator
- SSDT PCIe generator
- ConfigurationManagerObjectParser
- Dynamic Plat Repo, the Token Mapper and the TokenFixer map.
- FdtHwInfoParser library
Cc: Pierre Gondois <Pierre.Gondois@arm.com>
Cc: Yeo Reum Yun <YeoReum.Yun@arm.com>
Cc: AbdulLateef Attar <AbdulLateef.Attar@amd.com>
Cc: Jeshua Smith <jeshuas@nvidia.com>
Cc: Jeff Brasen <jbrasen@nvidia.com>
Cc: Girish Mahadevan <gmahadevan@nvidia.com>
Cc: Leif Lindholm <quic_llindhol@quicinc.com>
Cc: Meenakshi Aggarwal <meenakshi.aggarwal@nxp.com>
Signed-off-by: Sami Mujawar <sami.mujawar@arm.com>
Signed-off-by: Pierre Gondois <pierre.gondois@arm.com>
Reviewed-by: Sunil V L <sunilvl@ventanamicro.com>
Move FADT Fixed Features Flags object from Arm Namespace to the
Arch Common namespace.
Correspondingly also update the following modules to reflect the
changes introduced by the move:
- FADT Generator
- ConfigurationManagerObjectParser
- Dynamic Plat Repo TokenFixer map.
Cc: Pierre Gondois <Pierre.Gondois@arm.com>
Cc: Yeo Reum Yun <YeoReum.Yun@arm.com>
Cc: AbdulLateef Attar <AbdulLateef.Attar@amd.com>
Cc: Jeshua Smith <jeshuas@nvidia.com>
Cc: Jeff Brasen <jbrasen@nvidia.com>
Cc: Girish Mahadevan <gmahadevan@nvidia.com>
Cc: Leif Lindholm <quic_llindhol@quicinc.com>
Cc: Meenakshi Aggarwal <meenakshi.aggarwal@nxp.com>
Signed-off-by: Sami Mujawar <sami.mujawar@arm.com>
Signed-off-by: Pierre Gondois <pierre.gondois@arm.com>
Reviewed-by: Sunil V L <sunilvl@ventanamicro.com>
Move Hypervisor Vendor Id info object from Arm Namespace to
the Arch Common namespace.
Correspondingly also update the following modules to reflect the
changes introduced by the move:
- FADT Generator
- ConfigurationManagerObjectParser
- Dynamic Plat Repo TokenFixer map.
Cc: Pierre Gondois <Pierre.Gondois@arm.com>
Cc: Yeo Reum Yun <YeoReum.Yun@arm.com>
Cc: AbdulLateef Attar <AbdulLateef.Attar@amd.com>
Cc: Jeshua Smith <jeshuas@nvidia.com>
Cc: Jeff Brasen <jbrasen@nvidia.com>
Cc: Girish Mahadevan <gmahadevan@nvidia.com>
Cc: Leif Lindholm <quic_llindhol@quicinc.com>
Cc: Meenakshi Aggarwal <meenakshi.aggarwal@nxp.com>
Signed-off-by: Sami Mujawar <sami.mujawar@arm.com>
Signed-off-by: Pierre Gondois <pierre.gondois@arm.com>
Reviewed-by: Sunil V L <sunilvl@ventanamicro.com>
Move Serial port info objects like the generic serial port info,
Serial console port info and Serial debug port info from Arm
Namespace to the Arch Common namespace.
i.e.
EArmObjSerialPortInfo -> EArchCommonObjSerialPortInfo
EArmObjConsolePortInfo -> EArchCommonObjConsolePortInfo
EArmObjSerialDebugPortInfo -> EArchCommonObjSerialDebugPortInfo
CM_ARM_SERIAL_PORT_INFO -> CM_ARCH_COMMON_SERIAL_PORT_INFO
Correspondingly also update the following modules to reflect the
changes introduced by the move:
- DBG2 Generator
- SPCR Generator
- SSDT Serial Port Fixup Lib
- SSDT Serial Port Generator
- FdtHwInfoParserLib/ArmSerialPortParser
- ConfigurationManagerObjectParser
- Dynamic Plat Repo TokenFixer map.
Cc: Pierre Gondois <Pierre.Gondois@arm.com>
Cc: Yeo Reum Yun <YeoReum.Yun@arm.com>
Cc: AbdulLateef Attar <AbdulLateef.Attar@amd.com>
Cc: Jeshua Smith <jeshuas@nvidia.com>
Cc: Jeff Brasen <jbrasen@nvidia.com>
Cc: Girish Mahadevan <gmahadevan@nvidia.com>
Cc: Leif Lindholm <quic_llindhol@quicinc.com>
Cc: Meenakshi Aggarwal <meenakshi.aggarwal@nxp.com>
Signed-off-by: Sami Mujawar <sami.mujawar@arm.com>
Reviewed-by: Sunil V L <sunilvl@ventanamicro.com>
The PowerManagementProfileInfo Object has been moved from the
Arm Namespace to the Arch Common namespace.
Therefore, update the Kvmtool Guest firmware configuration
manager to reflect this change.
Cc: Pierre Gondois <Pierre.Gondois@arm.com>
Cc: Yeo Reum Yun <YeoReum.Yun@arm.com>
Cc: AbdulLateef Attar <AbdulLateef.Attar@amd.com>
Cc: Jeshua Smith <jeshuas@nvidia.com>
Cc: Jeff Brasen <jbrasen@nvidia.com>
Cc: Girish Mahadevan <gmahadevan@nvidia.com>
Cc: Leif Lindholm <quic_llindhol@quicinc.com>
Cc: Meenakshi Aggarwal <meenakshi.aggarwal@nxp.com>
Signed-off-by: Sami Mujawar <sami.mujawar@arm.com>
Reviewed-by: Sunil V L <sunilvl@ventanamicro.com>
Move PowerManagementProfileInfo Object from Arm Namespace to the
Arch Common namespace.
The following updates are also done to reflect the changes introduced
by the move:
- Update the FADT Generator to migrate to use the Power Management
Profile Info object CM_ARCH_COMMON_POWER_MANAGEMENT_PROFILE_INFO
and EArchCommonObjPowerManagementProfileInfo.
- Update the Configuration manager object parser to parse Arch
Common namespace objects and update the parsing of the Power
Management Profile information object from Arm namespace to
the Arch Common namespace.
- Update the Dynamic Plat Repo TokenFixer map
Cc: Pierre Gondois <Pierre.Gondois@arm.com>
Cc: Yeo Reum Yun <YeoReum.Yun@arm.com>
Cc: AbdulLateef Attar <AbdulLateef.Attar@amd.com>
Cc: Jeshua Smith <jeshuas@nvidia.com>
Cc: Jeff Brasen <jbrasen@nvidia.com>
Cc: Girish Mahadevan <gmahadevan@nvidia.com>
Cc: Leif Lindholm <quic_llindhol@quicinc.com>
Cc: Meenakshi Aggarwal <meenakshi.aggarwal@nxp.com>
Signed-off-by: Sami Mujawar <sami.mujawar@arm.com>
Reviewed-by: Sunil V L <sunilvl@ventanamicro.com>
The Arm Namespace Object ID Reserved29 was a reserved ID
that was never used. Therefore, drop the EArmObjReserved29
object ID also update the Dynamic Plat Repo TokenFixer map
and the Configuration Manager Object Parser.
Cc: Pierre Gondois <Pierre.Gondois@arm.com>
Cc: Yeo Reum Yun <YeoReum.Yun@arm.com>
Cc: AbdulLateef Attar <AbdulLateef.Attar@amd.com>
Cc: Jeshua Smith <jeshuas@nvidia.com>
Cc: Jeff Brasen <jbrasen@nvidia.com>
Cc: Girish Mahadevan <gmahadevan@nvidia.com>
Cc: Leif Lindholm <quic_llindhol@quicinc.com>
Cc: Meenakshi Aggarwal <meenakshi.aggarwal@nxp.com>
Signed-off-by: Sami Mujawar <sami.mujawar@arm.com>
Signed-off-by: Pierre Gondois <pierre.gondois@arm.com>
Reviewed-by: Sunil V L <sunilvl@ventanamicro.com>
The Arm Namespace Object ID for CPU info was not used.
Therefore, drop the EArmObjCpuInfo object ID. Also remove
- the partial listing of the Arm Namespace object IDs from
ConfigurationManagerObject.h and add a reference to the
location where they are defined.
- the parsing code in Configuration Manager ObjectParser.
- update the Dynamic Plat Repo TokenFixer map.
Cc: Pierre Gondois <Pierre.Gondois@arm.com>
Cc: Yeo Reum Yun <YeoReum.Yun@arm.com>
Cc: AbdulLateef Attar <AbdulLateef.Attar@amd.com>
Cc: Jeshua Smith <jeshuas@nvidia.com>
Cc: Jeff Brasen <jbrasen@nvidia.com>
Cc: Girish Mahadevan <gmahadevan@nvidia.com>
Cc: Leif Lindholm <quic_llindhol@quicinc.com>
Cc: Meenakshi Aggarwal <meenakshi.aggarwal@nxp.com>
Signed-off-by: Sami Mujawar <sami.mujawar@arm.com>
Signed-off-by: Pierre Gondois <pierre.gondois@arm.com>
Reviewed-by: Sunil V L <sunilvl@ventanamicro.com>
Remove the partial listing of the Arm Namespace object IDs
from and add a reference to the enum EARM_OBJECT_ID that is
used to describe the object in the ARM Namespace.
Also document that the Arch Common namespace objects will be
described using the enum EARCH_COMMON_OBJECT_ID.
Cc: Pierre Gondois <Pierre.Gondois@arm.com>
Cc: Yeo Reum Yun <YeoReum.Yun@arm.com>
Cc: AbdulLateef Attar <AbdulLateef.Attar@amd.com>
Cc: Jeshua Smith <jeshuas@nvidia.com>
Cc: Jeff Brasen <jbrasen@nvidia.com>
Cc: Girish Mahadevan <gmahadevan@nvidia.com>
Cc: Leif Lindholm <quic_llindhol@quicinc.com>
Cc: Meenakshi Aggarwal <meenakshi.aggarwal@nxp.com>
Signed-off-by: Sami Mujawar <sami.mujawar@arm.com>
Signed-off-by: Pierre Gondois <pierre.gondois@arm.com>
Reviewed-by: Sunil V L <sunilvl@ventanamicro.com>
Update DynamicPlatRepo to reflect the introduction of the Arch
Common namespace. Also, update the TokenFixer map to reflect the
current state of the ArmNamespace Objects and add a note in the
documentation header for the EARM_OBJECT_ID enum, that the Token
fixer map needs updating whenever the ArmObjectId space is updated.
Cc: Pierre Gondois <Pierre.Gondois@arm.com>
Cc: Yeo Reum Yun <YeoReum.Yun@arm.com>
Cc: AbdulLateef Attar <AbdulLateef.Attar@amd.com>
Cc: Jeshua Smith <jeshuas@nvidia.com>
Cc: Jeff Brasen <jbrasen@nvidia.com>
Cc: Girish Mahadevan <gmahadevan@nvidia.com>
Cc: Leif Lindholm <quic_llindhol@quicinc.com>
Cc: Meenakshi Aggarwal <meenakshi.aggarwal@nxp.com>
Signed-off-by: Sami Mujawar <sami.mujawar@arm.com>
Signed-off-by: Pierre Gondois <pierre.gondois@arm.com>
Reviewed-by: Sunil V L <sunilvl@ventanamicro.com>
Update the Token Fixer to return objects other than Arm Namespace
objects as unsupported.
Cc: Pierre Gondois <Pierre.Gondois@arm.com>
Cc: Yeo Reum Yun <YeoReum.Yun@arm.com>
Cc: AbdulLateef Attar <AbdulLateef.Attar@amd.com>
Cc: Jeshua Smith <jeshuas@nvidia.com>
Cc: Jeff Brasen <jbrasen@nvidia.com>
Cc: Girish Mahadevan <gmahadevan@nvidia.com>
Cc: Leif Lindholm <quic_llindhol@quicinc.com>
Cc: Meenakshi Aggarwal <meenakshi.aggarwal@nxp.com>
Signed-off-by: Sami Mujawar <sami.mujawar@arm.com>
Signed-off-by: Pierre Gondois <pierre.gondois@arm.com>
Reviewed-by: Sunil V L <sunilvl@ventanamicro.com>
Update the Cm Object Parser to support parsing of Arch Common
namespace objects.
Cc: Pierre Gondois <Pierre.Gondois@arm.com>
Cc: Yeo Reum Yun <YeoReum.Yun@arm.com>
Cc: AbdulLateef Attar <AbdulLateef.Attar@amd.com>
Cc: Jeshua Smith <jeshuas@nvidia.com>
Cc: Jeff Brasen <jbrasen@nvidia.com>
Cc: Girish Mahadevan <gmahadevan@nvidia.com>
Cc: Leif Lindholm <quic_llindhol@quicinc.com>
Cc: Meenakshi Aggarwal <meenakshi.aggarwal@nxp.com>
Signed-off-by: Sami Mujawar <sami.mujawar@arm.com>
Signed-off-by: Pierre Gondois <pierre.gondois@arm.com>
Reviewed-by: Sunil V L <sunilvl@ventanamicro.com>
Introduce a new header file for defining the Arch Common Namespace
objects. Also include it in the Configuration Manager Object header
file so that the required definitions are propagated.
Cc: Pierre Gondois <Pierre.Gondois@arm.com>
Cc: Yeo Reum Yun <YeoReum.Yun@arm.com>
Cc: AbdulLateef Attar <AbdulLateef.Attar@amd.com>
Cc: Jeshua Smith <jeshuas@nvidia.com>
Cc: Jeff Brasen <jbrasen@nvidia.com>
Cc: Girish Mahadevan <gmahadevan@nvidia.com>
Cc: Leif Lindholm <quic_llindhol@quicinc.com>
Cc: Meenakshi Aggarwal <meenakshi.aggarwal@nxp.com>
Signed-off-by: Sami Mujawar <sami.mujawar@arm.com>
Signed-off-by: Pierre Gondois <pierre.gondois@arm.com>
Reviewed-by: Sunil V L <sunilvl@ventanamicro.com>
Add ObjectId to CM_OBJ_PARSER_ARRAY so that the code can validate
the entries in the Cm object parser array. Also introduce helper
macros to populate the Cm Object Parser Arrays.
Cc: Pierre Gondois <Pierre.Gondois@arm.com>
Cc: Yeo Reum Yun <YeoReum.Yun@arm.com>
Cc: AbdulLateef Attar <AbdulLateef.Attar@amd.com>
Cc: Jeshua Smith <jeshuas@nvidia.com>
Cc: Jeff Brasen <jbrasen@nvidia.com>
Cc: Girish Mahadevan <gmahadevan@nvidia.com>
Cc: Leif Lindholm <quic_llindhol@quicinc.com>
Cc: Meenakshi Aggarwal <meenakshi.aggarwal@nxp.com>
Signed-off-by: Sami Mujawar <sami.mujawar@arm.com>
Signed-off-by: Pierre Gondois <pierre.gondois@arm.com>
Reviewed-by: Sunil V L <sunilvl@ventanamicro.com>
The CM_ARM_PROC_NODE_ID_INFO was dropped by the patch at
"b2bbe3df5470 DynamicTablesPkg: Remove PPTT ID structure
from ACPI 6.4 generator" and the EArmObjProcNodeIdInfo was
made EArmObjReserved29.
Since ProcNodeIdInfo is no longer used drop the CM object
parser code from EArmObjProcNodeIdInfo and specify a null
entry for EArmObjReserved29.
Cc: Pierre Gondois <Pierre.Gondois@arm.com>
Cc: Yeo Reum Yun <YeoReum.Yun@arm.com>
Cc: AbdulLateef Attar <AbdulLateef.Attar@amd.com>
Cc: Jeshua Smith <jeshuas@nvidia.com>
Cc: Jeff Brasen <jbrasen@nvidia.com>
Cc: Girish Mahadevan <gmahadevan@nvidia.com>
Cc: Leif Lindholm <quic_llindhol@quicinc.com>
Cc: Meenakshi Aggarwal <meenakshi.aggarwal@nxp.com>
Signed-off-by: Sami Mujawar <sami.mujawar@arm.com>
Signed-off-by: Pierre Gondois <pierre.gondois@arm.com>
Reviewed-by: Sunil V L <sunilvl@ventanamicro.com>
The parameters of CreateAmlProcessorContainer() were not
updated in:
commit 5fb3f5723a ("DynamicTablesPkg: Allow for specified CPU names")
This causes the EccCheck CI test to fail. Fix this.
Cc: Pierre Gondois <Pierre.Gondois@arm.com>
Cc: Yeo Reum Yun <YeoReum.Yun@arm.com>
Cc: AbdulLateef Attar <AbdulLateef.Attar@amd.com>
Cc: Jeshua Smith <jeshuas@nvidia.com>
Cc: Jeff Brasen <jbrasen@nvidia.com>
Cc: Girish Mahadevan <gmahadevan@nvidia.com>
Cc: Leif Lindholm <quic_llindhol@quicinc.com>
Cc: Meenakshi Aggarwal <meenakshi.aggarwal@nxp.com>
Signed-off-by: Pierre Gondois <pierre.gondois@arm.com>
Reviewed-by: Sunil V L <sunilvl@ventanamicro.com>
Introduce an Arch Common Namespace so that the common
architectural objects can be defined under this namespace
in the Configuration manager. Also rearrange the namespace
IDs so that the Arch Common Namespace has a value of 0x1,
the Arm Namespace ID has a value of 0x2, and the Custom/OEM
namespace ID has a value of 0xF. Also introduce a helper
macro to create configuration manager objects in the Arch
Common Namespace.
The Arch Common Namespace shall contain objects like
Serial Port, PCI Bus information etc. It must not contain
Architecture specific components e.g. GICC which is Arm
architecture specific component and therefore must be
defined in the Arm Namespace.
Cc: Pierre Gondois <Pierre.Gondois@arm.com>
Cc: Yeo Reum Yun <YeoReum.Yun@arm.com>
Cc: AbdulLateef Attar <AbdulLateef.Attar@amd.com>
Cc: Jeshua Smith <jeshuas@nvidia.com>
Cc: Jeff Brasen <jbrasen@nvidia.com>
Cc: Girish Mahadevan <gmahadevan@nvidia.com>
Cc: Leif Lindholm <quic_llindhol@quicinc.com>
Cc: Meenakshi Aggarwal <meenakshi.aggarwal@nxp.com>
Signed-off-by: Sami Mujawar <sami.mujawar@arm.com>
Reviewed-by: Sunil V L <sunilvl@ventanamicro.com>
This patch is to fix issue caused by uninitialized local
variable in Pei/Variable.c.
In the fucntion CalculateHobVariableCacheSize(), the local
variable VARIABLE_STORE_INFO StoreInfo is used without
initialization. When the uninitialized variable is passed
to CalculateAuthVarStorageSize() and GetNextVariablePtr(),
the field StoreInfo->FtwLastWriteData might be a uninitialized
non-zero value. Then the code execution will access the
invalid address StoreInfo->FtwLastWriteData->TargetAddress.
This might cause issue.
So in this commit, the local variable VARIABLE_STORE_INFO
StoreInfo is initialized by a ZeroMem() before use.
Signed-off-by: Dun Tan <dun.tan@intel.com>
This commit is to fix smm code assert issue when SMM Profile
is enabled.
When SMM Profile is enabled, the function InitProtectedMemRange()
retrives MMIO ranges from GCD and store the MMIO ranges in the
mProtectionMemRange. When ReadyToLock, the function InitPaging()
modifies the page table based on the mProtectionMemRange. If the
MMIO ranges in mProtectionMemRange is not 4k aligned, code will
assert when modifying page table.
In this commit, we skip the MMIO ranges that BaseAddress and Length
are not 4k aligned when creating mProtectionMemRange. This will only
cause each access to the skipped MMIO range to be logged. In current
failure case on QEMU and QSP SimicsOpenBoard, the skipped MMIO range
is [0xFED00000, 0xFED00400] for HPET. Considering that the probability
of HPET MMIO range being accessed is very small in SMM, the solution
in this commit is acceptable and simple.
Signed-off-by: Dun Tan <dun.tan@intel.com>
GCC5 and CLANGDWARF for IA32/X64 use -Os or -Oz as the optimization
level, which agressively optimizes for the smallest possible object
code.
On AARCH64, RISCV64 and ARM, we use -O3 instead, which results in
considerable image bloat, to the point where the Raspberry Pi 4 build in
edk2-platforms does not even build with -D SECURE_BOOT_ENABLE.
So let's align CLANGDWARF across all architectures, and use -Oz
throughout.
Note that O3 is still used for the linker, which build in LTO mode and
therefore performs some code generation as well. This is deliberate: LLD
does not support the Os/Oz optimization levels at all, and using Oz for
the compile pass is sufficient to reduce the code size substantially.
Signed-off-by: Ard Biesheuvel <ardb@kernel.org>
This patch adds an assert to FmpDxe.c to catch a platform
misconfiguration of PcdFmpDeviceImageTypeIdGuid.
Signed-off-by: Oliver Smith-Denny <osde@linux.microsoft.com>
Retire the special ResetSystemLib implementation for the PEI phase on
virtual platforms, which has been superseded by the generic version
combined with a PEI-compatible implementation of ArmMonitorLib.
Signed-off-by: Ard Biesheuvel <ardb@kernel.org>
The TPM2 related PEIMs depend on ResetSystemLib too, and so in order to
be able to switch to the generic ArmPkg implementation which relies on
ArmMonitorLib, the latter library class requires a PEIM-compatible
implementation too.
Signed-off-by: Ard Biesheuvel <ardb@kernel.org>
Switch to the new, generic ArmPsciResetSystemLib implementation that
obtains the conduit using ArmMonitorLib, of which a version already
exists that determines the conduit by looking up the PSCI DT node.
This permits the removal of the ArmVirtPkg specific implementation of
ResetSystemLib, which essentially does the exact same thing, but in a
single library.
Signed-off-by: Ard Biesheuvel <ardb@kernel.org>
This library is no longer used, and has been superseded by
ArmPsciResetSystemLib based on ArmMonitorLib. So delete it.
Signed-off-by: Ard Biesheuvel <ardb@kernel.org>
This change simply moves the trigger to `pull_request_target`. The
rest of this message contains verbose details related to that.
`pull_request_target` is used instead of `pull_request` since the
default GitHub token cannot pick up write permissions with the
`pull_request` type on PRs from public forks. Write permission is
needed to add reviewrs. This was previously tested on an edk2 fork
where PRs were not from other public forks into the fork being used
for testing but directly on the fork itself.
Because `pull_request_target` runs the pull request in the context
of the base branch (not the PR branch) some logic needs slightly
modified. The main change is that the GitHub context will no longer
give the PR branch HEAD as the PR commit SHA (i.e.
`github.event.pull_request.head.sha`). The SHA will be the base
branch (`master`) SHA as that is what is checked out for the
workflow run. SO, the actual PR SHA is now fetched separately.
Signed-off-by: Michael Kubacki <michael.kubacki@microsoft.com>
REF:https://bugzilla.tianocore.org/show_bug.cgi?id=4819
Code Coverage was added to PR pipelines in 89c5d90 and is currently
running on every pull request. It is run in a separate job that is
queued after all builds from the build matrix have completed. This
means it extends the entire pipeline run by placing it at the
beginning of the build queue right when it should be finished.
In turn, pipeline runs that should finish in 30 minutes are taking
over 3 hours.
This has a substantial impact on the developer efficiency of the
entire community. This patch disables code coverage until a more
sustainable solution can be swapped in.
Users can still get code coverage locally.
Signed-off-by: Michael Kubacki <michael.kubacki@microsoft.com>
Fire an event if a long delay occurs when starting an NVMe device.
This can be used by platforms to draw pictures on the screen or
take other actions to notify a user or move boot forward.
Signed-off-by: Oliver Smith-Denny <osde@linux.microsoft.com>
REF : https://bugzilla.tianocore.org/show_bug.cgi?id=4787
If ACPI Silicon Hob has been found from entry of AcpiTableDxe driver,
that means SOC related ACPI tables been pass to the DXE phase by HOB.
Each SOC related ACPI tables will be install.
Signed-off-by: George Liao <george.liao@intel.com>
ShellPkg.dsc is missing a few applications in the package. They are
added to the DSC in this change to include the ShellPkg build.
Signed-off-by: Michael Kubacki <michael.kubacki@microsoft.com>
Now that all of the EFI_MEMORY_* defines live in the
EFI_MEMORY_TYPE enum, remove the old defines.
Signed-off-by: Oliver Smith-Denny <osde@linux.microsoft.com>
Per TCBZ2372, clang on Linux emits a warning if an enum-typed variable
is compared with a constant outside of the range of the enum. Such
comparisons are performed in multiple locations in DXE core on
variables of type EFI_MEMORY_TYPE. This patch moves the OEM and OS
reserved types into the EFI_MEMORY_TYPE enum itself to resolve this
issue and improve readability. This commit does this for the MdePkg
copy of this enum.
Signed-off-by: Oliver Smith-Denny <osde@linux.microsoft.com>
Per TCBZ2372, clang on Linux emits a warning if an enum-typed variable
is compared with a constant outside of the range of the enum. Such
comparisons are performed in multiple locations in DXE core on
variables of type EFI_MEMORY_TYPE. This patch moves the OEM and OS
reserved types into the EFI_MEMORY_TYPE enum itself to resolve this
issue and improve readability. This commit does this for the BaseTools
copy of this enum.
Signed-off-by: Oliver Smith-Denny <osde@linux.microsoft.com>
The SMCCC protocol stipulates the following:
- on AARCH64, 18 arguments can be passed, and 18 values can be returned,
via registers X0-x17;
- on ARM, 8 arguments can be passed, and 8 values can be returned.
This makes ArmSmcLib and ArmHvcLib as implemented currently unsuitable
for use with SMCCC services in general, although for PSCI in particular,
they work fine.
The dependency on both ArmSmcLib and ArmHvcLib is also impractical
because it requires every platform that consumes ArmMonitorLib to
provide resolutions for each, even though most platforms will only ever
need one of these (and the choice is made at compile time)
So let's drop these dependencies, and re-implement the asm helpers from
scratch. Note that the only difference is the actual instruction used
-HVC vs SMC- and so all other code can be shared.
Signed-off-by: Ard Biesheuvel <ardb@kernel.org>
Feature PCDs and fixed-at-build PCDs are identical in concept, but the
latter are accessible from assembler, whereas the former are not. So
convert the SMCCC conduit selection PCD to fixed-at-build so we can make
use of this in a subsequent patch.
Continuous-integration-options: PatchCheck.ignore-multi-package
Signed-off-by: Ard Biesheuvel <ardb@kernel.org>
REF: https://bugzilla.tianocore.org/show_bug.cgi?id=4813
Some strings not match SMBIOS specification definition,
include uppercase and lowercase, wrong characters, extra words,...etc
Signed-off-by: HoraceX Lien <horacex.lien@intel.com>
Cc: Liming Gao <gaoliming@byosoft.com.cn>
Reviewed-by: Liming Gao <gaoliming@byosoft.com.cn>
Structure assignment may depend on the compiler to expand to memcpy.
For this, we may need to add -mno-memcpy to the compilation flag.
Here, we reduce dependencies and use CopyMem for data conversion without
memcpy.
Cc: Ray Ni <ray.ni@intel.com>
Cc: Rahul Kumar <rahul1.kumar@intel.com>
Cc: Gerd Hoffmann <kraxel@redhat.com>
Cc: Jiaxin Wu <jiaxin.wu@intel.com>
Cc: Chao Li <lichao@loongson.cn>
Signed-off-by: Dongyan Qian <qiandongyan@loongson.cn>
Co-authored-by: Chao Li <lichao@loongson.cn>
Adds a new GitHub workflow to automatically add reviewers to pull
requests when they are opened, reopened, synchronized, and if a draft
pull request is marked as ready for review. The workflow will not
run on draft pull requests.
The workflow is meant to be simple to understand and modify, relying
on existing logic in GetMaintainer.py to determine the relevant
reviewers and using simple Python GitHub REST API wrappers with the
default GitHub token for authentication.
Future changes may optimize the workflow.
Signed-off-by: Michael Kubacki <michael.kubacki@microsoft.com>
Adds a script that provides GitHub API helpers for workflows and
other GitHub automation in the repository.
Signed-off-by: Michael Kubacki <michael.kubacki@microsoft.com>
Adds a new `-g` parameter so that output will also include the GitHub
username.
This change uses a simple regular expression as opposed to directly
returning the original line from the file to make the extraction of
GitHub usernames more robust to other changes on the line in the
maintainers text file.
Signed-off-by: Michael Kubacki <michael.kubacki@microsoft.com>
Passing in access attributes to SetMemorySpaceAttributes() will cause
the existing attributes to be overwritten. The MMIO region should have
the appropriate attributes applied during memory protection
initialization and the attributes of the memory space descriptor are
inaccurate. Don't pass in any CPU arch attributes so
SetMemorySpaceAttributes() doesn't subsequently call
gCpu->SetMemoryAttributes().
Signed-off-by: Oliver Smith-Denny <osde@linux.microsoft.com>
The ARM SMCCC specification stipulates that the conduit for ARM monitor
calls can be determined by taking the conduit for PSCI calls. The
converse is also true, and so we can implement ResetSystemLib for PSCI
using ArmMonitorLib to choose between SMC and HVC instructions.
Signed-off-by: Ard Biesheuvel <ardb@kernel.org>
Fix up a handful of uncrustify infractions and drop the AuditOnly
override for uncrustify so we get the same uncrustify CI coverage as
other packages.
Signed-off-by: Ard Biesheuvel <ardb@kernel.org>
Given that the second parameter can be universally set to TRUE across
all use cases, its removal simplifies the function interface and the
associated code paths.
Signed-off-by: Zhiguang Liu <zhiguang.liu@intel.com>
Analysis of the current usage patterns revealed that this parameter
should consistently set to TRUE.
Specifically, the parameter was found to be False in the following
scenarios:
1. During the initial volatile register setup for the first AP wake-up
in both the PEI and DXE phases. In these instances, the volatile
registers are pre-initialized in MpInitLibInitialize(),
and manually setting them to zero does not require altering the DR
state.
2. When switching the BSP, the new BSP does not synchronize the DR.
This behavior is now adjusted to ensure the DR state is synchronized,
aligning with a more logical and expected behavior when transitioning
BSP roles.
Signed-off-by: Zhiguang Liu <zhiguang.liu@intel.com>
In previoud commit, we remove the ApInitReconfig status. Now there
are only two status ApInitConfig and ApInitDone.
Only the very first waking up AP needs to set ApInitConfig status.
Therefore, if this is not the first wake up, set ApInitDone status
Signed-off-by: Zhiguang Liu <zhiguang.liu@intel.com>
ApInitReconfig status is used to indicate that when AP wakes up, AP
need to restore volatile registers from BSP and use InitSipiSipi. Since
we handle the volatile registers well, we can use WakeUpByInitSipiSipi
flag to replace ApInitReconfig. Avoid using ApInitReconfig can simplify
code.
Signed-off-by: Zhiguang Liu <zhiguang.liu@intel.com>