1. Do not use tab characters
2. No trailing white space in one line
3. All files must end with CRLF
Contributed-under: TianoCore Contribution Agreement 1.1
Signed-off-by: Liming Gao <liming.gao@intel.com>
Reviewed-by: Star Zeng <star.zeng@intel.com>
The SATA spec mandates that link detection by the PHY completes within
10 ms after receiving a reset signal. However, there is no obligation
to uphold this requirement at the driver end as strictly as we do, and
as it turns out, some combinations of host and device (e.g., Samsung
850 EVO connected to a LeMaker Cello) are only borderline compliant,
which means the device is not detected reliably.
So let's allow for a bit of margin, and increase the PHY detect timeout
value to 15 ms.
Contributed-under: TianoCore Contribution Agreement 1.0
Signed-off-by: Ard Biesheuvel <ard.biesheuvel@linaro.org>
Reviewed-by: Star Zeng <star.zeng@intel.com>
Per AHCI 1.1 spec, AE bit of GHC register is read-only if CAP.SAM is 1
Contributed-under: TianoCore Contribution Agreement 1.0
Signed-off-by: Feng Tian <feng.tian@intel.com>
Reviewed-by: Star Zeng <star.zeng@intel.com>
git-svn-id: https://svn.code.sf.net/p/edk2/code/trunk/edk2@16321 6f19259b-4bc3-4df7-8a09-765794883524
1. Boost IDE mode boot when slave device is absent.
2. Use D2H FIS to check if the PIO OUT/DMA IN/DMA OUT transfer is finished or error happened. ATA PIO IN has special check as it may just receive PIO SETUP FIS for success case.
3. Add command status register check for IDE DMA transfer.
4. ScsiDiskReadCapacity() in ScsiDisk should return EFI_SUCCESS if SENSE Data request is success.
Signed-off-by: erictian
Reviewed-by: rsun3
Reviewed-by: xdu2
Reviewed-by: mdkinney
git-svn-id: https://edk2.svn.sourceforge.net/svnroot/edk2/trunk/edk2@12658 6f19259b-4bc3-4df7-8a09-765794883524
Liming Gao
Ruiyu Ni
Ard Biesheuvel
Feng Tian
erictian
qianouyang