Some virtual machine managers like Kvmtool emulate the MC146818
RTC controller in the MMIO space so that architectures that do
not support I/O Mapped I/O can use the RTC. This patch adds MMIO
support to the RTC controller driver.
The PCD PcdRtcUseMmio has been added to select I/O or MMIO support.
If PcdRtcUseMmio is:
TRUE - Indicates the RTC port registers are in MMIO space.
FALSE - Indicates the RTC port registers are in I/O space.
Default is I/O space.
Additionally two new PCDs PcdRtcIndexRegister64 and
PcdRtcTargetRegister64 have been introduced to provide the base
address for the RTC registers in the MMIO space.
When MMIO support is selected (PcdRtcUseMmio == TRUE) the driver
converts the pointers to the RTC MMIO registers so that the
RTC registers are accessible post ExitBootServices.
Signed-off-by: Sami Mujawar <sami.mujawar@arm.com>
Reviewed-by: Ard Biesheuvel <ard.biesheuvel@arm.com>
Acked-by: Laszlo Ersek <lersek@redhat.com>
PcdRealTimeClockUpdateTimeout is now defined in MdeModulePkg.dec.
This is the only reason that causes PcAtChipsetPkg depends on
MdeModulePkg.
Move the PCD from MdeModulePkg.dec to PcAtChipsetPkg.dec removes
such dependency.
Signed-off-by: Ray Ni <ray.ni@intel.com>
Reviewed-by: Hao A Wu <hao.a.wu@intel.com>
Reviewed-by: Star Zeng <star.zeng@intel.com>
1. Do not use tab characters
2. No trailing white space in one line
3. All files must end with CRLF
Contributed-under: TianoCore Contribution Agreement 1.1
Signed-off-by: Liming Gao <liming.gao@intel.com>
Reviewed-by: Ruiyu Ni <ruiyu.ni@intel.com>
In certain HW implementation, the BIT7 of RTC Index register(0x70) is
for NMI sources enable/disable but the BIT7 of 0x70 cannot be read
before writing. Software which doesn't want to change the NMI sources
enable/disable setting can write to the alias register 0x74, through
which only BIT0 ~ BIT6 of 0x70 is modified.
So two new PCDs are added so that platform can have the flexibility
to change the default RTC register addresses from 0x70/0x71 to
0x74/0x75.
With the new PCDs added, it can also support special HW that provides
RTC storage in a different register pairs.
Contributed-under: TianoCore Contribution Agreement 1.1
Signed-off-by: Ruiyu Ni <ruiyu.ni@intel.com>
Reviewed-by: Star Zeng <star.zeng@intel.com>
Use FixedPCD's to set platform-specific values for RTC registers.
Specifically, the replaced macros are:
1) RTC_INIT_REGISTER_A
2) RTC_INIT_REGISTER_B
3) RTC_INIT_REGISTER_D
Cc: Ruiyu Ni <ruiyu.ni@intel.com>
Contributed-under: TianoCore Contribution Agreement 1.1
Signed-off-by: Leo Duran <leo.duran@amd.com>
Reviewed-by: Ruiyu Ni <ruiyu.ni@intel.com>
The patch updates the Century value in CMOS location specified
by FADT.Century to avoid UEFI Win7 hang during booting.
Per the ACPI spec if the FADT.Century is zero, it's not needed
to store the century value in CMOS. But UEFI Win7 treats the
Century storage is optional only when FADT.Century is 0x80.
While Linux strictly follows the ACPI spec and treats Century
storage is optional when FADT.Century is 0.
So if a platform wants to support both UEFI Win7 and Linux,
it needs to report FADT.Century to a traditional value which
doesn't equal to 0 or 0x80 (0x32 mostly). And RTC driver is
enhanced to save the century value to the location specified
by FADT.Century.
Contributed-under: TianoCore Contribution Agreement 1.0
Signed-off-by: Ruiyu Ni <ruiyu.ni@intel.com>
Reviewed-by: Star Zeng <star.zeng@intel.com>
git-svn-id: https://svn.code.sf.net/p/edk2/code/trunk/edk2@19442 6f19259b-4bc3-4df7-8a09-765794883524
1. Usage information in INF file comment blocks are either incomplete or incorrect.
This includes usage information for Protocols/PPIs/GUIDs/PCDs/HOBs/Events/BootModes.
The syntax for usage information in comment blocks is defined in the EDK II Module Information (INF) Specification
Contributed-under: TianoCore Contribution Agreement 1.0
Signed-off-by: Qiu, Shumin <shumin.qiu@intel.com>
Reviewed-by: Gao, Liming <liming.gao@intel.com>
git-svn-id: https://svn.code.sf.net/p/edk2/code/trunk/edk2@15942 6f19259b-4bc3-4df7-8a09-765794883524