The BasePostCodeLibPort80 instance just prints UINT8 to IoPort 80. Some boards
may support 16bit or 32bit. To support them, new PCD PcdPort80DataWidth is
introduced to specify the width of data bits to Port80.
Contributed-under: TianoCore Contribution Agreement 1.0
Signed-off-by: Liming Gao <liming.gao@intel.com>
Reviewed-by: Star Zeng <star.zeng@intel.com>
Reviewed-by: Jiewen Yao <jiewen.yao@intel.com>
git-svn-id: https://svn.code.sf.net/p/edk2/code/trunk/edk2@18765 6f19259b-4bc3-4df7-8a09-765794883524
1) UefiLib adds features of RFC 3066/Iso639 language string and driver model protocols installation.
2) PeiCoreEntryPoint following PI.
3) UefiDriverEntryPoint following UEFI/EFI.
4) PeiServicesTablePointerLib following PI for IPF and x86.
5) Remove many CommonHeader.h. If there is only one C file in module, we should add the common headers in C file instead of creating a new CommonHeader.h.
git-svn-id: https://edk2.svn.sourceforge.net/svnroot/edk2/trunk/edk2@2723 6f19259b-4bc3-4df7-8a09-765794883524
Rename BasePostCodeLib80 to BasePostCodeLibPort80.
Fix typos in macro POST_CODE() and POST_CODE_WITH_DESCRIPTION()
2. DebugLib
Change the parameter type of LineNumber of DebugAssert() from “INTN” to “UINTN” to follow MWG.
Add type cast “(EFI_GUID *)” in macro ASSERT_PROTCOL_ALREADY_INSTALLED () to follow MWG.
3. BasePeCoffLib/
Add library function header for all the interfaces in MWG.
Add missing ASSERT()s.
4. PciLib
Add ASSERT()s in PciRead/WriteBuffer() to check cross PCI function access.
git-svn-id: https://edk2.svn.sourceforge.net/svnroot/edk2/trunk/edk2@557 6f19259b-4bc3-4df7-8a09-765794883524
Liming Gao
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