Commit Graph

20 Commits

Author SHA1 Message Date
Qi Zhang 414d7d11e6 IntelFsp2WrapperPkg: remove gPeiTpmInitializationDonePpiGuid from Depex
REF: https://bugzilla.tianocore.org/show_bug.cgi?id=2963

Cc: Chasel Chiu <chasel.chiu@intel.com>
Cc: Nate DeSimone <nathaniel.l.desimone@intel.com>
Cc: Star Zeng <star.zeng@intel.com>
Cc: Cc: Jiewen Yao <jiewen.yao@intel.com>
Signed-off-by: Qi Zhang <qi1.zhang@intel.com>
Reviewed-by: Chasel Chiu <chasel.chiu@intel.com>
2020-09-16 05:16:02 +00:00
Jiewen Yao 53ea57fea4 IntelFsp2WraperPkg/Fsp{m|s}WrapperPeim: Add FspBin measurement.
REF: https://bugzilla.tianocore.org/show_bug.cgi?id=2376

Cc: Jiewen Yao <jiewen.yao@intel.com>
Cc: Chasel Chiu <chasel.chiu@intel.com>
Cc: Nate DeSimone <nathaniel.l.desimone@intel.com>
Cc: Star Zeng <star.zeng@intel.com>
Cc: Qi Zhang <qi1.zhang@intel.com>
Signed-off-by: Jiewen Yao <jiewen.yao@intel.com>
Message-Id: <20200818062618.3698-5-qi1.zhang@intel.com>
Reviewed-by: Jian J Wang <jian.j.wang@intel.com>
Reviewed-by: Chasel Chiu <chasel.chiu@intel.com>
2020-08-26 15:56:11 +00:00
Antoine Coeur 97eedf5dfb IntelFsp2WrapperPkg: Fix various typos
Fix various typos in comments and documentation.

Cc: Chasel Chiu <chasel.chiu@intel.com>
Cc: Nate DeSimone <nathaniel.l.desimone@intel.com>
Cc: Star Zeng <star.zeng@intel.com>
Reviewed-by: Philippe Mathieu-Daude <philmd@redhat.com>
Signed-off-by: Philippe Mathieu-Daude <philmd@redhat.com>
Reviewed-by: Nate DeSimone <nathaniel.l.desimone@intel.com>
Reviewed-by: Chasel Chiu <chasel.chiu@intel.com>
Reviewed-by: Star Zeng <star.zeng@intel.com>
2019-12-11 01:42:31 +00:00
Ray Ni 7bf5255997 IntelFsp2WrapperPkg: Remove unneeded MdeModulePkg dependency
Signed-off-by: Ray Ni <ray.ni@intel.com>
Reviewed-by: Chasel Chiu <chasel.chiu@intel.com>
Cc: Nate DeSimone <nathaniel.l.desimone@intel.com>
Reviewed-by: Star Zeng <star.zeng@intel.com>
2019-09-05 02:10:03 +08:00
Chasel Chiu 00e3e48014 IntelFsp2WrapperPkg/FspsWrapperPeim: Fix coding style.
REF: https://bugzilla.tianocore.org/show_bug.cgi?id=1730

Internal code quality check failed after this commit:
68d47eea42, fixed those
coding style issues.

Cc: Nate DeSimone <nathaniel.l.desimone@intel.com>
Cc: Star Zeng <star.zeng@intel.com>
Signed-off-by: Chasel Chiu <chasel.chiu@intel.com>
Reviewed-by: Star Zeng <star.zeng@intel.com>
2019-04-23 10:39:47 +08:00
Chasel, Chiu 68d47eea42 IntelFsp2WrapperPkg: Perform post FSP-S process.
REF: https://bugzilla.tianocore.org/show_bug.cgi?id=1716

In API mode FSP wrapper will perform some post
FSP-S process but such process was skipped in Dispatch
mode which may impact some of the boot loaders.
To align behavior between API and Dispatch, an
End-of-Pei callback is introduced to perform same process
in Dispatch mode.

Note: If boot loader implemented its own
      PostFspsHobProcess (), it has to check
      PcdFspModeSelection and support each mode
      properly.

Test: Verified on internal platform and both
      FSP API and Dispatch modes booted successfully.

Cc: Nate DeSimone <nathaniel.l.desimone@intel.com>
Cc: Star Zeng <star.zeng@intel.com>
Signed-off-by: Chasel Chiu <chasel.chiu@intel.com>
Reviewed-by: Star Zeng <star.zeng@intel.com>
Reviewed-by: Nate DeSimone <nathaniel.l.desimone@intel.com>
2019-04-16 12:46:58 +08:00
Michael D Kinney 512e23a333 IntelFsp2WrapperPkg: Replace BSD License with BSD+Patent License
https://bugzilla.tianocore.org/show_bug.cgi?id=1373

Replace BSD 2-Clause License with BSD+Patent License.  This change is
based on the following emails:

  https://lists.01.org/pipermail/edk2-devel/2019-February/036260.html
  https://lists.01.org/pipermail/edk2-devel/2018-October/030385.html

RFCs with detailed process for the license change:

  V3: https://lists.01.org/pipermail/edk2-devel/2019-March/038116.html
  V2: https://lists.01.org/pipermail/edk2-devel/2019-March/037669.html
  V1: https://lists.01.org/pipermail/edk2-devel/2019-March/037500.html

Contributed-under: TianoCore Contribution Agreement 1.1
Signed-off-by: Michael D Kinney <michael.d.kinney@intel.com>
Reviewed-by: Chasel Chiu <chasel.chiu@intel.com>
2019-04-09 10:58:03 -07:00
Chasel, Chiu e8f40b770f IntelFsp2WrapperPkg: Fix constant if statements issue
REF: https://bugzilla.tianocore.org/show_bug.cgi?id=1351

Internal code quality scanning found 2 constant if
statements related to FixedPcdGet8 () usage.
Since the PCD can be PatchableInModule too, it should be
changed to PcdGet8 () to fix this issue.

Test: Verified on internal platform and booted successfully.

Cc: Jiewen Yao <Jiewen.yao@intel.com>
Cc: Desimone Nathaniel L <nathaniel.l.desimone@intel.com>
Cc: Wu Hao A <hao.a.wu@intel.com>
Contributed-under: TianoCore Contribution Agreement 1.1
Signed-off-by: Chasel Chiu <chasel.chiu@intel.com>
Reviewed-by: Star Zeng <star.zeng@intel.com>
Reviewed-by: Hao Wu <hao.a.wu@intel.com>
2018-11-26 11:40:38 +08:00
Chasel, Chiu 2098de6279 IntelFsp2WrapperPkg: Fix line ending format issue
REF: https://bugzilla.tianocore.org/show_bug.cgi?id=1352

Fixed line ending format wrong issues on some files.

Test: Verified building successfully.

Cc: Jiewen Yao <Jiewen.yao@intel.com>
Cc: Desimone Nathaniel L <nathaniel.l.desimone@intel.com>
Cc: Wu Hao A <hao.a.wu@intel.com>
Contributed-under: TianoCore Contribution Agreement 1.1
Signed-off-by: Chasel Chiu <chasel.chiu@intel.com>
Reviewed-by: Star Zeng <star.zeng@intel.com>
Reviewed-by: Hao Wu <hao.a.wu@intel.com>
2018-11-26 11:40:27 +08:00
Chasel, Chiu 115336ccaf IntelFsp2WrapperPkg: Support FSP Dispatch mode
REF: https://bugzilla.tianocore.org/show_bug.cgi?id=1300

Provides PCD selection for FSP Wrapper to support Dispatch
mode. Also PcdFspmBaseAddress should support Dynamic for
recovery scenario (multiple FSP-M binary in flash)

Test: Verified on internal platform and both API and
      DISPATCH modes booted successfully.

Cc: Jiewen Yao <Jiewen.yao@intel.com>
Cc: Desimone Nathaniel L <nathaniel.l.desimone@intel.com>
Contributed-under: TianoCore Contribution Agreement 1.1
Signed-off-by: Chasel Chiu <chasel.chiu@intel.com>
Reviewed-by: Jiewen Yao <Jiewen.yao@intel.com>
2018-11-20 12:03:52 +08:00
Chasel, Chiu de1e1195b3 IntelFsp2WrapperPkg: Revert 90c5bc08
Commit message issue and reverted commit
90c5bc081d.

Will re-submit with correct formats.

Cc: Jiewen Yao <Jiewen.yao@intel.com>
Cc: Star Zeng <star.zeng@intel.com>
Contributed-under: TianoCore Contribution Agreement 1.1
Signed-off-by: Chasel Chiu <chasel.chiu@intel.com>
Reviewed-by: Star Zeng <star.zeng@intel.com>
2018-11-20 11:55:24 +08:00
Chasel, Chiu 90c5bc081d IntelFsp2WrapperPkg: Support FSP Dispatch mode
REF: https://bugzilla.tianocore.org/show_bug.cgi?id=1300

Provides PCD selection for FSP Wrapper to support Dispatch
mode. Also PcdFspmBaseAddress should support Dynamic for
recovery scenario (multiple FSP-M binary in flash)

Test: Verified on internal platform and both API and
      DISPATCH modes booted successfully.

Cc: Jiewen Yao <Jiewen.yao@intel.com>
Cc: Desimone Nathaniel L <nathaniel.l.desimone@intel.com>
Contributed-under: TianoCore Contribution Agreement 1.1
Signed-off-by: Chasel Chiu <chasel.chiu@intel.com>
2018-11-20 11:33:14 +08:00
Chasel, Chiu e69dcef54e IntelFsp2WrapperPkg: Support UPD allocation outside FspWrapper
UPD allocation and patching can be done outside FspWrapper
as implementation choice so adding a PCD to select between
original FspWrapper allocation model or outside model

Cc: Jiewen Yao <Jiewen.yao@intel.com>
Contributed-under: TianoCore Contribution Agreement 1.0
Signed-off-by: Chasel Chiu <chasel.chiu@intel.com>
Reviewed-by: Jiewen Yao <jiewen.yao@intel.com>
2017-11-29 15:52:25 +08:00
Liming Gao cada0f30e6 IntelFsp2WrapperPkg: Update Protocol/Guid usage in INF files
Contributed-under: TianoCore Contribution Agreement 1.1
Signed-off-by: Liming Gao <liming.gao@intel.com>
Cc: Jiewen Yao <jiewen.yao@intel.com>
Reviewed-by: Jiewen Yao <jiewen.yao@intel.com>
2017-10-10 18:10:24 +08:00
Yarlagadda, Satya P 19d29d358f IntelFsp2Pkg: Added changes to enable FPDT performance measurements
IntelFsp2Pkg:
1.Defined performance measure mask to mask the Perf id (Bits 63:56) of the
Perf Data from FSP Global data.
2.Replaced the hard coded perf ids to use the standard defines
from FspStatuscode.h
3.Add the PerfData form Fsp Global data ( for TempRaminit entry,
TempramInit exit, memoryinit entry) to FPDT entries

IntelFsp2WrapperPkg:
  Moved the code to add the FSP FPDT records and wrapper FPDT records
from ReadytoBoot event to EndofFirmware event

Cc: Maurice Ma <maurice.ma@intel.com>
Cc: Jiewen Yao <jiewen.yao@intel.com>
Cc: Giri P Mudusuru <giri.p.mudusuru@intel.com>
Contributed-under: TianoCore Contribution Agreement 1.0
Signed-off-by: Satya Yarlagadda <satya.p.yarlagadda@intel.com>
Reviewed-by: Maurice Ma <maurice.ma@intel.com>
Reviewed-by: Jiewen Yao <jiewen.yao@intel.com>
2016-10-27 14:19:44 +08:00
Liming Gao 04147690b5 IntelFsp2WrapperPkg: Remove unused header files from Fspm and Fsps WrapperPeim
PlatformSecLib.h is not used and removed.

Cc: Giri P Mudusuru <giri.p.mudusuru@intel.com>
Cc: Jiewen Yao <jiewen.yao@intel.com>
Contributed-under: TianoCore Contribution Agreement 1.0
Signed-off-by: Liming Gao <liming.gao@intel.com>
Reviewed-by: Giri P Mudusuru <giri.p.mudusuru@intel.com>
2016-07-14 15:01:41 +08:00
Hao Wu 599c45ff0b IntelFsp2WrapperPkg: Add error handling for possible NULL ptr dereference
Possible NULL pointer dereference for FspmHeaderPtr/FspsHeaderPtr in
module FspmWrapperPeim/FspsWrapperPeim.

Add error handling codes to avoid this issue.

Cc: Jiewen Yao <jiewen.yao@intel.com>
Contributed-under: TianoCore Contribution Agreement 1.0
Signed-off-by: Hao Wu <hao.a.wu@intel.com>
Reviewed-by: Jiewen Yao <jiewen.yao@intel.com>
Reviewed-by: Giri P Mudusuru <giri.p.mudusuru@intel.com>
2016-07-01 08:50:39 +08:00
Jiewen Yao f862a3b6f9 IntelFsp2WrapperPkg: Add support to handle ResetRequired return Status from FSP.
As per FSP 2.0 spec, FSP shall not trigger system reset and instead it
shall return from the FSP API to the BL/Wrapper with the required reset
type. The changes are to handle the ResetRequired return code from FSP
APIs and provide lib interface for platform to trigger the actual reset.

Cc: Giri P Mudusuru <giri.p.mudusuru@intel.com>
Cc: Amy Chan <amy.chan@intel.com>
Contributed-under: TianoCore Contribution Agreement 1.0
Signed-off-by: Satya Yarlagadda <satya.p.yarlagadda@intel.com>
Signed-off-by: Jiewen Yao <jiewen.yao@intel.com>
Reviewed-by: Giri P Mudusuru <giri.p.mudusuru@intel.com>
2016-06-18 07:17:04 +08:00
Jiewen Yao 6f6bf5c772 IntelFsp2WrapperPkg: Update gFspWrapperTokenSpaceGuid to gIntelFsp2WrapperTokenSpaceGuid.
We updated gIntelFspPkgTokenSpaceGuid to gIntelFsp2PkgTokenSpaceGuid
in IntelFsp2Pkg, but we miss the update in IntelFsp2WrapperPkg.
This patch fixed the issue and made them consistent.

Cc: Giri P Mudusuru <giri.p.mudusuru@intel.com>
Cc: Satya P Yarlagadda <satya.p.yarlagadda@intel.com>
Cc: Maurice Ma <maurice.ma@intel.com>
Cc: Ravi P Rangarajan <ravi.p.rangarajan@intel.com>
Contributed-under: TianoCore Contribution Agreement 1.0
Signed-off-by: Jiewen Yao <jiewen.yao@intel.com>
Reviewed-by: Giri P Mudusuru <giri.p.mudusuru@intel.com>
2016-05-23 09:27:29 +08:00
Jiewen Yao cf1d454983 Add IntelFsp2Pkg and IntelFsp2WrapperPkg.
Add FSP2.0 support.
This series of patch is to support FSP2.0 specification at
https://firmware.intel.com/sites/default/files/FSP_EAS_v2.0_Draft%20External.pdf

Some major updates include:
1) One FSP binary is separated to multiple components:
FSP-T, FSP-M, FSP-S, and optional FSP-O.
Each component has its own configuration data region.
2) All FSP-APIs use same UPD format - FSP_UPD_HEADER.
3) Add EnumInitPhaseEndOfFirmware notifyphase.
4) FSP1.1/FSP1.0 compatibility is NOT maintained.
5) We also add rename Fsp* to FspWrapper* in IntelFsp2WrapperPkg,
to indicate that it is for FspWrapper only.

IntelFspPkg and IntelFspWrapperPkg will be deprecated.
The new Intel platform will follow FSP2.0 and use IntelFsp2Pkg
and IntelFsp2WrapperPkg.
The old platform can still use IntelFspPkg and IntelFspWrapperPkg
for compatibility consideration.

Cc: Giri P Mudusuru <giri.p.mudusuru@intel.com>
Cc: Maurice Ma <maurice.ma@intel.com>
Cc: Ravi P Rangarajan <ravi.p.rangarajan@intel.com>
Contributed-under: TianoCore Contribution Agreement 1.0
Signed-off-by: Jiewen Yao <jiewen.yao@intel.com>
Reviewed-by: Giri P Mudusuru <giri.p.mudusuru@intel.com>
Reviewed-by: Maurice Ma <maurice.ma@intel.com>
Reviewed-by: Ravi P Rangarajan <ravi.p.rangarajan@intel.com>
2016-05-13 13:00:53 +08:00