Commit Graph

18 Commits

Author SHA1 Message Date
Michael D Kinney 9672cd3056 IntelFsp2Pkg: Replace BSD License with BSD+Patent License
https://bugzilla.tianocore.org/show_bug.cgi?id=1373

Replace BSD 2-Clause License with BSD+Patent License.  This change is
based on the following emails:

  https://lists.01.org/pipermail/edk2-devel/2019-February/036260.html
  https://lists.01.org/pipermail/edk2-devel/2018-October/030385.html

RFCs with detailed process for the license change:

  V3: https://lists.01.org/pipermail/edk2-devel/2019-March/038116.html
  V2: https://lists.01.org/pipermail/edk2-devel/2019-March/037669.html
  V1: https://lists.01.org/pipermail/edk2-devel/2019-March/037500.html

Contributed-under: TianoCore Contribution Agreement 1.1
Signed-off-by: Michael D Kinney <michael.d.kinney@intel.com>
Reviewed-by: Chasel Chiu <chasel.chiu@intel.com>
2019-04-09 10:58:03 -07:00
Chasel, Chiu 35897da27e IntelFsp2Pkg: Add function to get bootloader stack pointer
REF: https://bugzilla.tianocore.org/show_bug.cgi?id=1391

FSP on-going enhancement for stack utilization required
to know bootloader stack pointer and this pointer can be
retrieved by first input parameter address when FSP-M
entry API invoked by bootloader.

Test: Verified on internal platform and booting successfully

Cc: Nate DeSimone <nathaniel.l.desimone@intel.com>
Cc: Star Zeng <star.zeng@intel.com>
Contributed-under: TianoCore Contribution Agreement 1.1
Signed-off-by: Chasel Chiu <chasel.chiu@intel.com>
Reviewed-by: Star Zeng <star.zeng@intel.com>
Reviewed-by: Nate DeSimone <nathaniel.l.desimone@intel.com>
2019-01-28 15:25:53 +08:00
Chasel, Chiu e3b8fd1185 IntelFsp2Pkg: Remove unused keyword in new PPI header
REF: https://bugzilla.tianocore.org/show_bug.cgi?id=1477

There was unused keyword added in FspmArchConfigPpi.h
header block and should be removed.

Cc: Nate DeSimone <nathaniel.l.desimone@intel.com>
Cc: Star Zeng <star.zeng@intel.com>
Contributed-under: TianoCore Contribution Agreement 1.1
Signed-off-by: Chasel Chiu <chasel.chiu@intel.com>
Reviewed-by: Star Zeng <star.zeng@intel.com>
2019-01-21 15:49:02 +08:00
Chasel, Chiu 3837e2e038 IntelFsp2Pkg: Add FspmArchConfigPpi to support Dispatch mode
REF: https://bugzilla.tianocore.org/show_bug.cgi?id=1381

In Dispatch mode FSP may consume PPI directly so creating
FSPM_ARCH_CONFIG_PPI to align with FSPM_ARCH_UPD.
Also Keeps new structure size 8 bytes alignment as other
structures.

Test: Verified on internal platform to boot with this PPI
installed successfully.

Cc: Nate DeSimone <nathaniel.l.desimone@intel.com>
Cc: Star Zeng <star.zeng@intel.com>
Contributed-under: TianoCore Contribution Agreement 1.1
Signed-off-by: Chasel Chiu <chasel.chiu@intel.com>
Reviewed-by: Nate DeSimone <nathaniel.l.desimone@intel.com>
Reviewed-by: Star Zeng <star.zeng@intel.com>
2019-01-17 07:37:16 +08:00
Chasel, Chiu a2e61f341d IntelFsp2Pkg: Support FSP Dispatch mode
REF: https://bugzilla.tianocore.org/show_bug.cgi?id=1241

Add support for both API (original mode) and DISPATCH mode:
1. Add FspMode field from reserved byte of Global
   Data Structure to tell which mode is selected by boot
   loader. If boot loader invoking FSP-M API this field
   will remain as default 0 (API mode), otherwise platform
   FSP should set this field to 1 (Dispatch mode) when
   initializing Global Data Structure.
2. gFspInApiModePpiGuid will be instaled when FSP running in API
   mode and modules only for API mode should have this in depex.
3. If it is DISPATCH mode, FSP will return to PEI dispatcher,
   not directly return to boot loader.
4. DISPATCH mode supports DXE NotifyPhase drivers so FSP
   will not wait for PEI NotifyPhase callbacks, instead it
   will install gFspReadyForNotifyPhasePpiGuid PPI for
   platform to complete late initialization before transferring
   to DXE.

Test: Verified FSP API and DISPATCH modes on 2 internal
      platforms and both boot successfully.

Cc: Jiewen Yao <Jiewen.yao@intel.com>
Cc: Desimone Nathaniel L <nathaniel.l.desimone@intel.com>
Contributed-under: TianoCore Contribution Agreement 1.1
Signed-off-by: Chasel Chiu <chasel.chiu@intel.com>
Reviewed-by: Jiewen Yao <Jiewen.yao@intel.com>
2018-10-19 15:01:00 +08:00
Liming Gao e37bb20c7b IntelFsp2Pkg: Clean up source files
1. Do not use tab characters
2. No trailing white space in one line
3. All files must end with CRLF

Contributed-under: TianoCore Contribution Agreement 1.1
Signed-off-by: Liming Gao <liming.gao@intel.com>
2018-06-28 11:19:43 +08:00
Thomaiyar, Richard Marian f56ae7bf82 IntelFsp2Pkg: Support to return error status from FSP API done
Added FspMemoryInitDone2, FspTempRamExitDone2, FspSiliconInitDone2
to return error status to Boot Loader for FSP API calls.
To maintain backward compatibility existing functions
(FspMemoryInitDone, FspTempRamExitDone, FspSiliconInitDone)
declaration left untouched.

Cc: Maurice Ma <maurice.ma@intel.com>
Cc: Jiewen Yao <jiewen.yao@intel.com>
Cc: Giri P Mudusuru <giri.p.mudusuru@intel.com>
Contributed-under: TianoCore Contribution Agreement 1.0
Signed-off-by: Richard Thomaiyar <richard.marian.thomaiyar@intel.com>
Reviewed-by: Jiewen Yao <jiewen.yao@intel.com>
Reviewed-by: Giri P Mudusuru <giri.p.mudusuru@intel.com>
2016-11-14 12:11:05 +08:00
Satya Yarlagadda c44f9a42d4 IntelFsp2Pkg: Removing FSP Data Table
FSP Base address is part of FSP_INFO_HEADER and we don't need additional
table to report the base address of FSP components. we expect Boot
loaders to parse the FSP INFO Header to get the base address. Also, this
the FSP_DATA_TABLE is not defined in the FSP EAS and we don't see a need
for it.

Cc: Maurice Ma <maurice.ma@intel.com>
Cc: Jiewen Yao <jiewen.yao@intel.com>
Cc: Giri P Mudusuru <giri.p.mudusuru@intel.com>
Contributed-under: TianoCore Contribution Agreement 1.0
Signed-off-by: Satya Yarlagadda <satya.p.yarlagadda@intel.com>
Reviewed-by: Jiewen Yao <jiewen.yao@intel.com>
Reviewed-by: Giri P Mudusuru <giri.p.mudusuru@intel.com>
2016-10-28 23:25:15 +08:00
Yarlagadda, Satya P 19d29d358f IntelFsp2Pkg: Added changes to enable FPDT performance measurements
IntelFsp2Pkg:
1.Defined performance measure mask to mask the Perf id (Bits 63:56) of the
Perf Data from FSP Global data.
2.Replaced the hard coded perf ids to use the standard defines
from FspStatuscode.h
3.Add the PerfData form Fsp Global data ( for TempRaminit entry,
TempramInit exit, memoryinit entry) to FPDT entries

IntelFsp2WrapperPkg:
  Moved the code to add the FSP FPDT records and wrapper FPDT records
from ReadytoBoot event to EndofFirmware event

Cc: Maurice Ma <maurice.ma@intel.com>
Cc: Jiewen Yao <jiewen.yao@intel.com>
Cc: Giri P Mudusuru <giri.p.mudusuru@intel.com>
Contributed-under: TianoCore Contribution Agreement 1.0
Signed-off-by: Satya Yarlagadda <satya.p.yarlagadda@intel.com>
Reviewed-by: Maurice Ma <maurice.ma@intel.com>
Reviewed-by: Jiewen Yao <jiewen.yao@intel.com>
2016-10-27 14:19:44 +08:00
Gary Lin 058dcbf2b2 IntelFsp2Pkg: Fix typos in comments
- tempory -> temporary
- immediatly -> immediately
- permenent -> permanent
- funciton -> function

Cc: Jiewen Yao <jiewen.yao@intel.com>
Cc: Giri P Mudusuru <giri.p.mudusuru@intel.com>
Contributed-under: TianoCore Contribution Agreement 1.0
Signed-off-by: Gary Lin <glin@suse.com>
Reviewed-by: Jiewen Yao <jiewen.yao@intel.com>
Reviewed-by: Giri P Mudusuru <giri.p.mudusuru@intel.com>
2016-10-24 09:26:31 +08:00
Maurice Ma 7e9cf61205 IntelFsp2Pkg: Only include required header files in FspEas.h
Current FspEas.h file includes Uefi.h which also refers to lots of other
UEFI header files not used by FSP consumer. It caused many unnecessary
header file overhead for a bootloader that consumes FSP, such as coreboot.
This change reduces the required header file number down to 3.

Cc: Jiewen Yao <jiewen.yao@intel.com>
Cc: Giri P Mudusuru <giri.p.mudusuru@intel.com>
Contributed-under: TianoCore Contribution Agreement 1.0
Signed-off-by: Maurice Ma <maurice.ma@intel.com>
Reviewed by: Giri P Mudusuru <giri.p.mudusuru@intel.com>
2016-08-05 08:42:09 -07:00
Satya Yarlagadda 40bc750914 IntelFsp2Pkg: Remove CarBase and CarSize from FSP_GLOBAL_DATA
CarBase and CarSize in Fsp Global data structure are no longer needed as
Boot loader doesn't pass them to FSP even in case that BL chooses to skip calling
the FspTempRamInit API. In case of FspTempramInit is called, we can use the PCDs
to identify the CarBase and Size. Hence we remove the relevant code.

Cc: Giri P Mudusuru <giri.p.mudusuru@intel.com>
Cc: Jiewen Yao <jiewen.yao@intel.com>
Contributed-under: TianoCore Contribution Agreement 1.0
Signed-off-by: Satya Yarlagadda <satya.p.yarlagadda@intel.com>
Reviewed-by: Giri P Mudusuru <giri.p.mudusuru@intel.com>
Reviewed-by: Jiewen Yao <jiewen.yao@intel.com>
2016-07-23 09:20:04 +08:00
Satya Yarlagadda 35126af96c IntelFsp2Pkg BaseFspPlatformLib: Remove Boot Loader tempram Migration
In FSP2.0, Boot loader should migrate its temp ram before
calling the tempramexit API to tear down the tempram. so, we don't need the
function to migrate the BL TempRam in the IntelFsp2Pkg.

Cc: Giri P Mudusuru <giri.p.mudusuru@intel.com>
Cc: Jiewen Yao <jiewen.yao@intel.com>
Contributed-under: TianoCore Contribution Agreement 1.0
Signed-off-by: Satya Yarlagadda <satya.p.yarlagadda@intel.com>
Reviewed-by: Giri P Mudusuru <giri.p.mudusuru@intel.com>
Reviewed-by: Jiewen Yao <jiewen.yao@intel.com>
2016-07-18 13:17:23 +08:00
Yarlagadda, Satya P 6b5677e1bb IntelFsp2Pkg-BaseFspCommonLib: Add funtion to return the reset required status
Added new funtion in FSPCommonLib to update the FSP API return status with
the requested return status and return the control to the boot loader.

Cc: Giri P Mudusuru <giri.p.mudusuru@intel.com>
Cc: Jiewen Yao <jiewen.yao@intel.com>
Contributed-under: TianoCore Contribution Agreement 1.0
Signed-off-by: Satya Yarlagadda <satya.p.yarlagadda@intel.com>
Reviewed-by: Giri P Mudusuru <giri.p.mudusuru@intel.com>
Reviewed-by: Jiewen Yao <jiewen.yao@intel.com>
2016-06-27 11:47:48 +08:00
Jiewen Yao cc0b456a05 IntelFsp2Pkg: rename GetFspVpdDataPointer() to GetFspCfgRegionDataPointer()
FSP2.0 removed VPD concept.
Rename GetFspVpdDataPointer() to GetFspCfgRegionDataPointer() to follow FSP2.0
specification (CfgRegionOffset).

Cc: Giri P Mudusuru <giri.p.mudusuru@intel.com>
Cc: Amy Chan <amy.chan@intel.com>
Cc: Satya Yarlagadda <satya.p.yarlagadda@intel.com>
Cc: Maurice Ma <maurice.ma@intel.com>
Contributed-under: TianoCore Contribution Agreement 1.0
Signed-off-by: Jiewen Yao <jiewen.yao@intel.com>
Reviewed-by: Giri P Mudusuru <giri.p.mudusuru@intel.com>
Reviewed-by: Amy Chan <amy.chan@intel.com>
2016-06-18 07:19:04 +08:00
Giri P Mudusuru 190895683a IntelFsp2Pkg: Add missing OEM status code defines.
Adding defines from FSP EAS v2.0 section 11.2.2 Oem Status code.

Cc: Jiewen Yao <jiewen.yao@intel.com>
Cc: Maurice Ma <maurice.ma@intel.com>
Contributed-under: TianoCore Contribution Agreement 1.0
Signed-off-by: Giri P Mudusuru <giri.p.mudusuru@intel.com>
Reviewed-by: Jiewen Yao <Jiewen.yao@intel.com>
Reviewed-by: Maurice Ma <maurice.ma@intel.com>
2016-06-01 13:27:28 -07:00
Jiewen Yao 6d0ac98825 IntelFsp2Pkg/FspApi.h: Add comment for structure definition.
Add doxygen style comment for structure definition.

Cc: Giri P Mudusuru <giri.p.mudusuru@intel.com>
Cc: Satya P Yarlagadda <satya.p.yarlagadda@intel.com>
Cc: Maurice Ma <maurice.ma@intel.com>
Cc: Ravi P Rangarajan <ravi.p.rangarajan@intel.com>
Contributed-under: TianoCore Contribution Agreement 1.0
Signed-off-by: Jiewen Yao <jiewen.yao@intel.com>
Reviewed-by: Giri P Mudusuru <giri.p.mudusuru@intel.com>
2016-05-20 08:46:58 +08:00
Jiewen Yao cf1d454983 Add IntelFsp2Pkg and IntelFsp2WrapperPkg.
Add FSP2.0 support.
This series of patch is to support FSP2.0 specification at
https://firmware.intel.com/sites/default/files/FSP_EAS_v2.0_Draft%20External.pdf

Some major updates include:
1) One FSP binary is separated to multiple components:
FSP-T, FSP-M, FSP-S, and optional FSP-O.
Each component has its own configuration data region.
2) All FSP-APIs use same UPD format - FSP_UPD_HEADER.
3) Add EnumInitPhaseEndOfFirmware notifyphase.
4) FSP1.1/FSP1.0 compatibility is NOT maintained.
5) We also add rename Fsp* to FspWrapper* in IntelFsp2WrapperPkg,
to indicate that it is for FspWrapper only.

IntelFspPkg and IntelFspWrapperPkg will be deprecated.
The new Intel platform will follow FSP2.0 and use IntelFsp2Pkg
and IntelFsp2WrapperPkg.
The old platform can still use IntelFspPkg and IntelFspWrapperPkg
for compatibility consideration.

Cc: Giri P Mudusuru <giri.p.mudusuru@intel.com>
Cc: Maurice Ma <maurice.ma@intel.com>
Cc: Ravi P Rangarajan <ravi.p.rangarajan@intel.com>
Contributed-under: TianoCore Contribution Agreement 1.0
Signed-off-by: Jiewen Yao <jiewen.yao@intel.com>
Reviewed-by: Giri P Mudusuru <giri.p.mudusuru@intel.com>
Reviewed-by: Maurice Ma <maurice.ma@intel.com>
Reviewed-by: Ravi P Rangarajan <ravi.p.rangarajan@intel.com>
2016-05-13 13:00:53 +08:00