X64\ExceptionHandlerAsm.S define MARCO to set up 32 IDT entries header.
It assume GCC compiler will generate the same code length on the following
instrction for each IDT entry.
jmp ASM_PFX(CommonInterruptEntry)
It works with GCC 4.x. However, GCC 5.4 will generate different code size of IDT
entry code per the offset value from CommonInterruptEntry address. We should use
DB to make sure each IDT entry header has the same size whatever compiler
version.
.ASM and .nasm used the different solution and do not have this issue.
https://bugzilla.tianocore.org/show_bug.cgi?id=389
Cc: Liming Gao <liming.gao@intel.com>
Cc: Feng Tian <feng.tian@intel.com>
Cc: Michael D Kinney <michael.d.kinney@intel.com>
Contributed-under: TianoCore Contribution Agreement 1.0
Signed-off-by: Jeff Fan <jeff.fan@intel.com>
Reviewed-by: Liming Gao <liming.gao@intel.com>
Make code consistence between ASM and S files.
Contributed-under: TianoCore Contribution Agreement 1.0
Signed-off-by: Jeff Fan <jeff.fan@intel.com>
Reviewed-by: Feng Tian <feng.tian@intel.com>
git-svn-id: https://svn.code.sf.net/p/edk2/code/trunk/edk2@16530 6f19259b-4bc3-4df7-8a09-765794883524
.S assembler files must be AT&T syntax ones. So Intel syntax mnemonic is not good. Discovered by clang integrated assembler.
Contributed-under: TianoCore Contribution Agreement 1.0
Signed-off-by: Nikolai Saoukh <nms@otdel-1.org>
Reviewed-by: Andrew Fish <afish@apple.com>
Reviewed-by: Jeff Fan <jeff.fan@intel.com>
git-svn-id: https://svn.code.sf.net/p/edk2/code/trunk/edk2@16098 6f19259b-4bc3-4df7-8a09-765794883524
CpuExceptionHandlerLib has code that contains absolute relocations, not supported by
Xcode for X64, and it then copies this code to an alternate location in memory. It is
very hard to write IP relative self-modifiying code. I had to update AsmVectorNumFixup()
to also patch in the absolute addressess after the code was copied.
Contributed-under: TianoCore Contribution Agreement 1.0
Signed-off-by: Anderw Fish <afish@apple.com>
Reviewed-by: Jeff Fan <jeff.fan@intel.com>
git-svn-id: https://svn.code.sf.net/p/edk2/code/trunk/edk2@16068 6f19259b-4bc3-4df7-8a09-765794883524
2. Updated CPU Exception Handler Library instance according to the new CPU Exception Handler Library class definitions.
3. Updated CPU Exception Handler Library instance to handle the vector attributes defined in PI 1.2.1.
Signed-off-by: Jeff Fan <jeff.fan@intel.com>
Reviewed-by: Jiewen Yao <jiewen.yao@intel.com>
Reviewed-by: Feng Tian <feng.tian@intel.com>
Reviewed-by: Hot Tian <hot.tian@intel.com>
git-svn-id: https://svn.code.sf.net/p/edk2/code/trunk/edk2@14885 6f19259b-4bc3-4df7-8a09-765794883524
Jeff Fan
Nikolai Saoukh
Anderw Fish
Laszlo Ersek
vanjeff