Commit Graph

20 Commits

Author SHA1 Message Date
gdong1 3176d84fe8 CorebootModulePkgPkg: Expose FindCbTag API from CbParseLib
CbPlatformSupportLib might use FindCbTag() API to parse
platform specific information. So expose this API.
And add EFIAPI to all functions in CbParseLib.

Contributed-under: TianoCore Contribution Agreement 1.0
Signed-off-by: Guo Dong <guo.dong@intel.com>
Reviewed-by: Maurice Ma <maurice.ma@intel.com>
2016-10-27 09:51:16 -07:00
gdong1 2d90b74d02 CorebootModulePkg: Fix memmap issue
Some reserved memory (e.g. CSE reserved memory) might be in the
middle of usable physical memory. The current memory map caculation
could not handle this case. This patch fixed this issue.

Contributed-under: TianoCore Contribution Agreement 1.0
Signed-off-by: gdong1 <guo.dong@intel.com>
Reviewed-by: Maurice Ma <maurice.ma@intel.com>
2016-10-26 17:11:54 -07:00
gdong1 2f20bfd98e CorebootModulePkg: Add a library to parse platform specific info.
Update CbSupportPei to consume the new library, so platform could provide
platform specific library instance to parse platform specif info.
And add a NULL library instance to pass build.

Contributed-under: TianoCore Contribution Agreement 1.0
Signed-off-by: gdong1 <guo.dong@intel.com>
Reviewed-by: Maurice Ma <maurice.ma@intel.com>
2016-10-26 15:34:30 -07:00
Leahy, Leroy P 24ca2f3507 CorebootPayloadPkg/PlatformBdsLib: Pass more serial parameters
Pass the serial port baudrate, register stride, input clock rate and
ID from coreboot to CorebootPayloadPkg.

Change-Id: I37111d23216e4effa2909337af7e8a6de36b61f7
Contributed-under: TianoCore Contribution Agreement 1.0
Signed-off-by: Lee Leahy <leroy.p.leahy@intel.com>
Reviewed-by: Prince Agyeman <prince.agyeman@intel.com>
2016-05-10 10:13:40 -07:00
Leahy, Leroy P bb0831670f CorebootModulePkg/BaseSerialPortLib: Set DTR and RTS
Ensure communication between the host and the UEFI system running
CorebootPayloadPkg.  In cases where the host has flow control enabled
and the serial connection is providing the flow control signals, the
host will not be able to send data to the UEFI system because DTR and
RTS are not present.  The host may also discard all output data from
the UEFI system because DTR is not present.  By setting DTR and RTS
in the UART initialization code this case works properly.

Change-Id: I393f57104d111472cafcae01d4e43d4ea837be3b
Contributed-under: TianoCore Contribution Agreement 1.0
Signed-off-by: Lee Leahy <leroy.p.leahy@intel.com>
Reviewed-by: Prince Agyeman <prince.agyeman@intel.com>
2016-05-10 10:12:15 -07:00
Leahy, Leroy P b08993bd13 CorebootModulePkg/BaseSerialPortLib16550: Remove white-space
Remove trailing white space.

Change-Id: I73c3a3e1e55eec20b09443de1966573c97fa74f8
Contributed-under: TianoCore Contribution Agreement 1.0
Signed-off-by: Lee Leahy <leroy.p.leahy@intel.com>
Reviewed-by: Prince Agyeman <prince.agyeman@intel.com>
2016-05-10 10:11:49 -07:00
Leahy, Leroy P 12460e227f CorebootModulePkg: Add BaseSerialPortLib16550
Copy MdeModulePkg/Library/BaseSerialPortLib16550 revision
89ecd4cf80.

Change-Id: Ie2fd0123bdd7aaba4335afdb1cb017f3690455c6
Contributed-under: TianoCore Contribution Agreement 1.0
Signed-off-by: Lee Leahy <leroy.p.leahy@intel.com>
Reviewed-by: Prince Agyeman <prince.agyeman@intel.com>
2016-05-10 10:10:19 -07:00
Leahy, Leroy P d1986e7566 CorebootModulePkg-CbParseLib: Fix bad reference in CbParseLib
Dereferencing pMemTableSize in debug statement displays bad values when
it is set to NULL.  Display the actual table size value instead.

TEST=Build and run on Galileo Gen2

Contributed-under: TianoCore Contribution Agreement 1.0
Signed-off-by: Lee Leahy <leroy.p.leahy@intel.com>
Reviewed-by: Erik Bjorge <erik.c.bjorge@intel.com>
Reviewed-by: Prince Agyeman <prince.agyeman@intel.com>
2016-02-26 10:02:41 -08:00
Leahy, Leroy P 79f4f6f0c9 CorebootModulePkg-CbParseLib: Add ACPI table verification
Verify the register address in the FADT.

TEST=Build and run on Galileo Gen2 when the FADT was not present.

Contributed-under: TianoCore Contribution Agreement 1.0
Signed-off-by: Lee Leahy <leroy.p.leahy@intel.com>
Reviewed-by: Erik Bjorge <erik.c.bjorge@intel.com>
Reviewed-by: Prince Agyeman <prince.agyeman@intel.com>
2016-02-26 10:02:25 -08:00
Guo Dong 05de9ab296 CorebootModulePkg: Get power management register addresses.
This patch will get power management event register address and power management GPE enable register address. 
Add missing code in CbParseLib.c.

Contributed-under: TianoCore Contribution Agreement 1.0
Signed-off-by: Guo Dong <guo.dong@intel.com>
Reviewed-by: Maurice Ma <maurice.ma@intel.com>

git-svn-id: https://svn.code.sf.net/p/edk2/code/trunk/edk2@17791 6f19259b-4bc3-4df7-8a09-765794883524
2015-07-01 09:41:58 +00:00
Guo Dong 2e1fffcec7 CorebootModulePkg: Fix GCC build failure.
This patch fixed a GCC build failure issue.

Contributed-under: TianoCore Contribution Agreement 1.0
Signed-off-by: Guo Dong <guo.dong@intel.com>
Reviewed-by: Maurice Ma <maurice.ma@intel.com>

git-svn-id: https://svn.code.sf.net/p/edk2/code/trunk/edk2@17519 6f19259b-4bc3-4df7-8a09-765794883524
2015-05-27 05:33:14 +00:00
Guo Dong 63bdd27a4f CorebootModulePkg/CbParseLib: Coding style update
This patch update file CbParseLib.c to make it consistent with EDKII coding style:
1) Add function comments.
2) Add {} for if statement.
3) Compare with NULL for pointer and compare with 0 for integer instead of using them like a BOOLEAN.
4) For debug information only, use EFI_D_INFO instead of EFI_D_ERROR
5) Correct IN, OUT modifier

Contributed-under: TianoCore Contribution Agreement 1.0
Signed-off-by: Guo Dong <guo.dong@intel.com>
Reviewed-by: Maurice Ma <maurice.ma@intel.com>

git-svn-id: https://svn.code.sf.net/p/edk2/code/trunk/edk2@17487 6f19259b-4bc3-4df7-8a09-765794883524
2015-05-20 08:32:55 +00:00
Guo Dong 1e6c931b52 CorebootModulePkg/CbParseLib: Fix coding issue in ACPI
Contributed-under: TianoCore Contribution Agreement 1.0
Signed-off-by: Guo Dong <guo.dong@intel.com>
Reviewed-by: Maurice Ma <maurice.ma@intel.com>

git-svn-id: https://svn.code.sf.net/p/edk2/code/trunk/edk2@17486 6f19259b-4bc3-4df7-8a09-765794883524
2015-05-20 08:29:11 +00:00
Guo Dong 11e058ec75 CorebootModulePkg/CbParseLib: Remove tab and spaces
Replace tab with space. Remove the sapce at the end of lines.

Contributed-under: TianoCore Contribution Agreement 1.0
Signed-off-by: Guo Dong <guo.dong@intel.com>
Reviewed-by: Maurice Ma <maurice.ma@intel.com>

git-svn-id: https://svn.code.sf.net/p/edk2/code/trunk/edk2@17485 6f19259b-4bc3-4df7-8a09-765794883524
2015-05-20 08:26:19 +00:00
Guo Dong 165c00599e CorebootModulePkg/CbParseLib: Support current Coreboot IMD
The latest coreboot use IMD (In Memory Database) to report Tables. This patch adds IMD support in UEFI payload.

Contributed-under: TianoCore Contribution Agreement 1.0
Signed-off-by: Guo Dong <guo.dong@intel.com>
Reviewed-by: Maurice Ma <maurice.ma@intel.com>

git-svn-id: https://svn.code.sf.net/p/edk2/code/trunk/edk2@17484 6f19259b-4bc3-4df7-8a09-765794883524
2015-05-20 08:21:18 +00:00
Scott Duplichan 42e548a846 CorebootModulePkg: DEBUG print format corrections
Fix DEBUG print formats so that pointers and 64-bit integer values
display correctly for both 32-bit and 64-bit builds.

Contributed-under: TianoCore Contribution Agreement 1.0
Signed-off-by: Scott Duplichan <scott@notabs.org>
Reviewed-by: Prince Agyeman <prince.agyeman@intel.com>

git-svn-id: https://svn.code.sf.net/p/edk2/code/trunk/edk2@17153 6f19259b-4bc3-4df7-8a09-765794883524
2015-04-10 02:42:04 +00:00
Scott Duplichan 3b17ae9e51 CorebootModulePkg: Change CbParseAcpiTable prototype to avoid gcc fail
Use of void** as a generic pointer to pointer is a Microsoft extension
to the C language and is not supported by gcc. Without this change, gcc
compile fails with error:
passing argument 1 of 'CbParseAcpiTable' from incompatible pointer type
note: expected 'void **' but argument is of type
'struct EFI_ACPI_3_0_ROOT_SYSTEM_DESCRIPTION_POINTER **'

Contributed-under: TianoCore Contribution Agreement 1.0
Signed-off-by: Scott Duplichan <scott@notabs.org>
Reviewed-by: Maurice Ma <maurice.ma@intel.com>

git-svn-id: https://svn.code.sf.net/p/edk2/code/trunk/edk2@17144 6f19259b-4bc3-4df7-8a09-765794883524
2015-04-10 02:41:01 +00:00
Scott Duplichan 7b0f636452 CorebootModulePkg: Remove unused static functions to prevent gcc build fail
The gcc build will fail with -Werror=unused-function when a compilation
unit defines a static function but never calls it.

Contributed-under: TianoCore Contribution Agreement 1.0
Signed-off-by: Scott Duplichan <scott@notabs.org>
Reviewed-by: Maurice Ma <maurice.ma@intel.com>

git-svn-id: https://svn.code.sf.net/p/edk2/code/trunk/edk2@17143 6f19259b-4bc3-4df7-8a09-765794883524
2015-04-10 02:05:57 +00:00
Scott Duplichan 5451fff49c CorebootModulePkg: Fix build failure with 32-bit NOOPT target
Fix build failure with 32-bit NOOPT target by replacing direct shift
of 64-bit integer with a function call. Otherwise Microsoft tool chains
will generate a call to function __allshl and fail to link.

Contributed-under: TianoCore Contribution Agreement 1.0
Signed-off-by: Scott Duplichan <scott@notabs.org>
Reviewed-by: Maurice Ma <maurice.ma@intel.com>

git-svn-id: https://svn.code.sf.net/p/edk2/code/trunk/edk2@17142 6f19259b-4bc3-4df7-8a09-765794883524
2015-04-10 02:05:48 +00:00
Maurice Ma fce4ecd92c Pkg-Module: CorebootModulePkg
Initial coreboot UEFI payload code check in. It provides UEFI services on top of coreboot that allows UEFI OS boot.
CorebootModulePkg is the source code package of coreboot support modules that will be used to parse the coreboot tables and report memory/io resources.

It supports the following features:
  - Support Unified Extensible Firmware Interface (UEFI) specification 2.4.
  - Support Platform Initialization(PI) specification 1.3.
  - Support execution as a coreboot payload.
  - Support USB 3.0
  - Support SATA/ATA devices.
  - Support EFI aware OS boot.

The following features are not supported currently and have not been validated:
  - GCC Tool Chains
  - SMM Execution Environment
  - Security Boot

It was tested on a Intel Bay Trail CRB platform.

Contributed-under: TianoCore Contribution Agreement 1.0
Signed-off-by: Maurice Ma <maurice.ma@intel.com>
Reviewed-by: Prince Agyeman <prince.agyeman@intel.com>

git-svn-id: https://svn.code.sf.net/p/edk2/code/trunk/edk2@17084 6f19259b-4bc3-4df7-8a09-765794883524
2015-03-31 01:06:23 +00:00