Add QemuRamfbDxe device path to the list of platform console devices,
so ConSplitter will pick up the device even though it isn't a PCI GPU.
Contributed-under: TianoCore Contribution Agreement 1.1
Signed-off-by: Gerd Hoffmann <kraxel@redhat.com>
Reviewed-by: Laszlo Ersek <lersek@redhat.com>
Tested-by: Laszlo Ersek <lersek@redhat.com>
Per PI spec, the Length value is the length of the ACPI descriptor
in bytes, excluding the first two fields.
The patch fixes the code to report the correct descriptor length
by excluding 3-byte first two fields.
Contributed-under: TianoCore Contribution Agreement 1.1
Signed-off-by: Ruiyu Ni <ruiyu.ni@intel.com>
Reviewed-by: Star Zeng <star.zeng@intel.com>
According the module type to include the header file.
Fixes: https://bugzilla.tianocore.org/show_bug.cgi?id=867
Contributed-under: TianoCore Contribution Agreement 1.1
Signed-off-by: Yonghong Zhu <yonghong.zhu@intel.com>
Reviewed-by: Liming Gao <liming.gao@intel.com>
Some platform support dynamic clocking, which is controlled by some
jumper setting or hardware registers. Result of that is that PCD
PL011UartClkInHz would need to be updated for frequency change.
This patch implements support for dynamic frequency for PL011 uart.
This patch implements default lib, which is using Pcd. Platform which
needs dynamic clocking needs implement PL011UartClockLib
Contributed-under: TianoCore Contribution Agreement 1.1
Signed-off-by: Udit Kumar <udit.kumar@nxp.com>
Reviewed-by: Ard Biesheuvel <ard.biesheuvel@linaro.org>
V3:
support exclude dir and file by name while traversing the directory.
remove close in with statement.
V2:
add version,description,copyright.
add flag -v,-q,--append-extensions,--override-extensions,--debug.
-q will omit default output,-v and --debug are not implemented.
add default file extensions.
support input of file path.
support muliple input path.
simplify comment.
change 'pattern'.encode() to b'pattern',I think this will be better.
change naming of variable and function to keep the same with BinToPcd.py
V1:
FormatDosFiles.py is added to clean up dos source files. It bases on
the rules defined in EDKII C Coding Standards Specification.
5.1.2 Do not use tab characters
5.1.6 Only use CRLF (Carriage Return Line Feed) line endings.
5.1.7 All files must end with CRLF
No trailing white space in one line. (To be added in spec)
The source files in edk2 project with the below postfix are dos format.
.h .c .nasm .nasmb .asm .S .inf .dec .dsc .fdf .uni .asl .aslc .vfr .idf
.txt .bat .py
The package maintainer can use this script to clean up all files in his
package. The prefer way is to create one patch per one package.
Contributed-under: TianoCore Contribution Agreement 1.1
Signed-off-by: Liming Gao <liming.gao@intel.com>
Signed-off-by: Dongao Guo <dongao.guo@intel.com>
Similar to commit 9dca2105ad, lower the
priority of the DEBUG print in SDReadWrite() to DEBUG_BLKIO.
Cc: Ard Biesheuvel <ard.biesheuvel@linaro.org>
Cc: Eric Dong <eric.dong@intel.com>
Contributed-under: TianoCore Contribution Agreement 1.1
Signed-off-by: Hao Wu <hao.a.wu@intel.com>
Reviewed-by: Star Zeng <star.zeng@intel.com>
REF:https://bugzilla.tianocore.org/show_bug.cgi?id=980
Adjust the DEBUG prints within function:
NvmeRead(), NvmeWrite(), AsyncNvmeRead() and AsyncNvmeWrite()
to DEBUG_BLKIO for the consistency with other storage device drivers
(e.g. ATA, USB and etc.).
Cc: Ard Biesheuvel <ard.biesheuvel@linaro.org>
Cc: Eric Dong <eric.dong@intel.com>
Contributed-under: TianoCore Contribution Agreement 1.1
Signed-off-by: Hao Wu <hao.a.wu@intel.com>
Reviewed-by: Star Zeng <star.zeng@intel.com>
The case is DSC file include file1, file1 include file2, after parse
file2 finished, DSC parser get the wrong section type, then it would
report invalid error.
Cc: Liming Gao <liming.gao@intel.com>
Cc: Yonghong Zhu <yonghong.zhu@intel.com>
Contributed-under: TianoCore Contribution Agreement 1.1
Signed-off-by: Yunhua Feng <yunhuax.feng@intel.com>
Reviewed-by: Yonghong Zhu <yonghong.zhu@intel.com>
Tested-by: Michael D Kinney <michael.d.kinney@intel.com>
Currently in DP, the Trace mode is enabled by default.
And the profile mode is not implemented. but the help info
of DP tool doesn't match current implementation. Which will
make user confused. So now remove the unused source code
related to the profile mode and update the help information
of DP tool.
V2: Remove the unused code related to profile mode.
Cc: Liming Gao <liming.gao@intel.com>
Cc: Ruiyu Ni <ruiyu.ni@intel.com>
Cc: Jaben Carsey <jaben.carsey@intel.com>
Contributed-under: TianoCore Contribution Agreement 1.1
Signed-off-by: Dandan Bi <dandan.bi@intel.com>
Reviewed-by: Liming Gao <liming.gao@intel.com>
Issue:
When run "dp -s" or ("dp -v") command in shell several times,
the summary reuslts are different each time.
The root cause is that the previous global data "SummaryData"
is not cleaned when the dp command is callled next time.
This patch initializes the global data "SummaryData"
when the dp dymanic command is called.
Cc: Liming Gao <liming.gao@intel.com>
Cc: Ruiyu Ni <ruiyu.ni@intel.com>
Cc: Jaben Carsey <jaben.carsey@intel.com>
Contributed-under: TianoCore Contribution Agreement 1.1
Signed-off-by: Dandan Bi <dandan.bi@intel.com>
Reviewed-by: Ruiyu Ni <ruiyu.ni@intel.com>
Run dp command now:
Firstly it will get performance records from FPDT and then
parse the DP command. And if encounter invalid parameters,
it will exit directly. Thus the performance records got before
are invalid. And what's worse is that the memory allocated in
getting performance records phase is not freed.
This patch update the code to parse the command firstly and
then get the performance records. And make sure that all the
clean work has been done before exiting.
Cc: Liming Gao <liming.gao@intel.com>
Cc: Ruiyu Ni <ruiyu.ni@intel.com>
Cc: Jaben Carsey <jaben.carsey@intel.com>
Contributed-under: TianoCore Contribution Agreement 1.1
Signed-off-by: Dandan Bi <dandan.bi@intel.com>
Reviewed-by: Ruiyu Ni <ruiyu.ni@intel.com>
As a security measure, some distros now build their GCC toolchains with
PIE code generation enabled by default, because it is a prerequisite
for ASLR to be enabled when running the executable.
This typically results in slightly larger code, but it also generates
ELF relocations that our tooling cannot deal with, so let's disable it
explicitly when using GCC49 or later for IA32. (Note that this does not
apply to X64: it uses PIE code deliberately in some cases, and our
tooling does deal with the resuling relocations)
Contributed-under: TianoCore Contribution Agreement 1.1
Signed-off-by: Ard Biesheuvel <ard.biesheuvel@linaro.org>
Acked-by: Laszlo Ersek <lersek@redhat.com>
Reviewed-by: Liming Gao <liming.gao@intel.com>
Commit 180ac200da changes the input parameter
from BOOLEAN to UINTN. Its comparison logic should be updated.
Contributed-under: TianoCore Contribution Agreement 1.1
Signed-off-by: Liming Gao <liming.gao@intel.com>
Cc: Star Zeng <star.zeng@intel.com>
Reviewed-by: Star Zeng <star.zeng@intel.com>
Commit cb96e7d4f7 changes the input parameter
from BOOLEAN to UINTN. Its comparison logic should be updated.
Contributed-under: TianoCore Contribution Agreement 1.1
Signed-off-by: Liming Gao <liming.gao@intel.com>
Reviewed-by: Star Zeng <star.zeng@intel.com>
Commit d2aafe1e41 changes the input parameter
from BOOLEAN to UINTN. Its comparison logic should be updated.
Contributed-under: TianoCore Contribution Agreement 1.1
Signed-off-by: Liming Gao <liming.gao@intel.com>
Cc: Michael Kinney <michael.d.kinney@intel.com>
Reviewed-by: Star Zeng <star.zeng@intel.com>
Switch to the new IoLib implementation that will only use KVM
safe instructions to perform MMIO memory accesses.
Contributed-under: TianoCore Contribution Agreement 1.1
Signed-off-by: Ard Biesheuvel <ard.biesheuvel@linaro.org>
Reviewed-by: Leif Lindholm <leif.lindholm@linaro.org>
Reviewed-by: Laszlo Ersek <lersek@redhat.com>
KVM on ARM refuses to decode load/store instructions used to perform
I/O to emulated devices, and instead relies on the exception syndrome
information to describe the operand register, access size, etc.
This is only possible for instructions that have a single input/output
register (as opposed to ones that increment the offset register, or
load/store pair instructions, etc). Otherwise, QEMU crashes with the
following error
error: kvm run failed Function not implemented
R00=01010101 R01=00000008 R02=00000048 R03=08000820
R04=00000120 R05=7faaa0e0 R06=7faaa0dc R07=7faaa0e8
R08=7faaa0ec R09=7faaa088 R10=000000ff R11=00000080
R12=ff000000 R13=7fccfe08 R14=7faa835f R15=7faa887c
PSR=800001f3 N--- T svc32
QEMU: Terminated
and KVM produces a warning such as the following in the kernel log
kvm [17646]: load/store instruction decoding not implemented
The IoLib implementation provided by MdePkg/Library/BaseIoLibIntrinsic
is based on C code, and when LTO is in effect, the MMIO accesses could
be merged with, e.g., manipulations of the loop counter, producing
opcodes that KVM does not support for emulated MMIO.
So let's add a special ArmVirt flavor of this library that implements
that actual load/store operations in assembler, ensuring that the
instructions involved can be emulated by KVM.
Contributed-under: TianoCore Contribution Agreement 1.1
Signed-off-by: Ard Biesheuvel <ard.biesheuvel@linaro.org>
Reviewed-by: Leif Lindholm <leif.lindholm@linaro.org>
Acked-by: Laszlo Ersek <lersek@redhat.com>
Reviewed-by: Liming Gao <liming.gao@intel.com>
The dsc nested include checking make unexpected build error when
building project A and switch to project B.
Contributed-under: TianoCore Contribution Agreement 1.1
Signed-off-by: Derek Lin <derek.lin2@hpe.com>
Reviewed-by: Yonghong Zhu <yonghong.zhu@intel.com>
This was the warning (shown for __aeabi_memcpy, __aeabi_memcpy4 and
__aeabi_memcpy8):
ArmPkg/Library/CompilerIntrinsicsLib/memcpy.c:42:6:
error: '__aeabi_memcpy8' alias between functions of incompatible types
'void(void*, const void *, size_t)'
{aka 'void(void *, const void *, unsigned int)'}
and 'void *(void *, const void *, size_t)'
{aka 'void *(void *, const void *, unsigned int)'} [-Werror=attribute-alias]
void __aeabi_memcpy8(void *dest, const void *src, size_t n);
ArmPkg/Library/CompilerIntrinsicsLib/memcpy.c:19:7: note: aliased declaration here
void *__memcpy(void *dest, const void *src, size_t n)
The problem is the different return type (void vs void*). So reshuffle
the code so the prototypes match between the aliases.
Contributed-under: TianoCore Contribution Agreement 1.1
Signed-off-by: Michael Zimmermann <sigmaepsilon92@gmail.com>
[ardb: change prototype of internal __memcpy() and drop extra wrapper]
Reviewed-by: Ard Biesheuvel <ard.biesheuvel@linaro.org>
Lower the priority of the DEBUG print in EmmcReadWrite(), which
is emitted for each read or write operation to the eMMC device,
which clutters up the log output of builds created with DEBUG_INFO
enabled.
Suggested-by: Pipat Methavanitpong <methavanitpong.pipat@socionext.com>
Contributed-under: TianoCore Contribution Agreement 1.1
Signed-off-by: Ard Biesheuvel <ard.biesheuvel@linaro.org>
Reviewed-by: Laszlo Ersek <lersek@redhat.com>
Reviewed-by: Star Zeng <star.zeng@intel.com>
Current implemenation sets PM1_CNT.SCI_EN bit at ReadyToBoot event.
However, this should not be done because this causes OS to skip triggering
FADT.SMI_CMD, which leads to the functions implemented in the SMI
handler being omitted.
This issue was identified by Matt Delco <delco@google.com>.
The fix does the following:
- The SCI_EN bit setting is removed from CbSupportDxe driver.
- Some additional checks are added in CbParseFadtInfo() in CbParseLib.c to
output some error message and ASSERT (FALSE) if ALL of the following
conditions are met:
1) HARDWARE_REDUCED_ACPI is not set;
2) SMI_CMD field is zero;
3) SCI_EN bit is zero;
which indicates the ACPI enabling status is inconsistent: SCI is not
enabled but the ACPI table does not provide a means to enable it through
FADT->SMI_CMD. This may cause issues in OS.
Cc: Maurice Ma <maurice.ma@intel.com>
Cc: Prince Agyeman <prince.agyeman@intel.com>
Cc: Matt Delco <delco@google.com>
Contributed-under: TianoCore Contribution Agreement 1.0
Signed-off-by: Benjamin You <benjamin.you@intel.com>
Reviewed-by: Maurice Ma <maurice.ma@intel.com>
Reviewed-by: Matt Delco <delco@google.com>
1. Separate variable definition and initialization.
2. Make the variable naming following Edk2 rule.
V2: Remove the updates of guard macros in header files.
Cc: Sami Mujawar <sami.mujawar@arm.com>
Cc: Evan Lloyd <evan.lloyd@arm.com>
Cc: Jaben Carsey <jaben.carsey@intel.com>
Cc: Ruiyu Ni <ruiyu.ni@intel.com>
Contributed-under: TianoCore Contribution Agreement 1.1
Signed-off-by: Dandan Bi <dandan.bi@intel.com>
Reviewed-by: Ruiyu Ni <ruiyu.ni@intel.com>
The patch 5a57246eab Rename String to StringUtils, but it didn't
update the UPT Tool for the import statement which cause UPT tool
break.
Contributed-under: TianoCore Contribution Agreement 1.1
Signed-off-by: Yonghong Zhu <yonghong.zhu@intel.com>
Reviewed-by: Liming Gao <liming.gao@intel.com>
Put the UART in FIFO Polled Mode by clearing IER after setting FCR.
Also, add comments to show DLAB state for registers 0 and 1.
Contributed-under: TianoCore Contribution Agreement 1.1
Signed-off-by: Leo Duran <leo.duran@amd.com>
Cc: Star Zeng <star.zeng@intel.com>
CC: Eric Dong <eric.dong@intel.com>
Reviewed-by: Ruiyu Ni <ruiyu.ni@intel.com>
Reviewed-by: Star Zeng <star.zeng@intel.com>
https://bugzilla.tianocore.org/show_bug.cgi?id=801
Use PlatformFlashWriteWithProgress() instead of PlatformFLashWrite()
so the user can be informed of the progress as a capsule is used
to update a firmware image in a firmware device.
Cc: Jiewen Yao <jiewen.yao@intel.com>
Signed-off-by: Michael D Kinney <michael.d.kinney@intel.com>
Contributed-under: TianoCore Contribution Agreement 1.1
Tested-by: Ard Biesheuvel <ard.biesheuvel@linaro.org>
Reviewed-by: Ard Biesheuvel <ard.biesheuvel@linaro.org>
Reviewed-by: Star Zeng <star.zeng@intel.com>
https://bugzilla.tianocore.org/show_bug.cgi?id=801
Based on content from the following branch/commits:
https://github.com/Microsoft/MS_UEFI/tree/share/MsCapsuleSupport
* Change Update_Image_Progress() to UpdateImageProcess()
* Call DisplayUpdateProgressLib from UpdateImageProgress().
* Split out a boot service and runtime version of
UpdateImageProgress() so the DisplayUpdateProgressLib is
not used at runtime.
* If gEdkiiFirmwareManagementProgressProtocolGuid is present,
then use its progress bar color and watchdog timer value.
* If gEdkiiFirmwareManagementProgressProtocolGuid is not present,
then use default progress bar color and 5 min watchdog timer.
* Remove Print() calls during capsule processing. Instead,
the DisplayUpdateProgressLib is used to inform the user
of progress during a capsule update.
Cc: Star Zeng <star.zeng@intel.com>
Cc: Eric Dong <eric.dong@intel.com>
Cc: Jiewen Yao <jiewen.yao@intel.com>
Cc: Sean Brogan <sean.brogan@microsoft.com>
Signed-off-by: Michael D Kinney <michael.d.kinney@intel.com>
Contributed-under: TianoCore Contribution Agreement 1.1
Tested-by: Ard Biesheuvel <ard.biesheuvel@linaro.org>
Reviewed-by: Ard Biesheuvel <ard.biesheuvel@linaro.org>
Reviewed-by: Star Zeng <star.zeng@intel.com>
The patch adds AtaAtapiPolicy protocol which is produced by platform
and consumed by AtaAtapiPassThruDxe driver.
Contributed-under: TianoCore Contribution Agreement 1.1
Signed-off-by: Ruiyu Ni <ruiyu.ni@intel.com>
Reviewed-by: Star Zeng <star.zeng@intel.com>
The patch adds support to certain devices that support PUIS (Power
up in Standby).
For those devices that supports SET_FEATURE spin up, SW needs to
send SET_FEATURE subcommand to spin up the devices.
For those devices that doesn't support SET_FEATURE spin up, SW needs
to send read sectors command to spin up the devices.
Contributed-under: TianoCore Contribution Agreement 1.1
Signed-off-by: Ruiyu Ni <ruiyu.ni@intel.com>
Reviewed-by: Chasel Chiu <chasel.chiu@intel.com>
Reviewed-by: Hao A Wu <hao.a.wu@intel.com>
NASM has replaced ASM and S files.
1. Remove ASM from all modules expect for the ones in ResetVector directory.
The ones in ResetVector directory are included by Vtf0.nasmb. They are
also nasm style.
2. Remove S files from the drivers only.
3. https://bugzilla.tianocore.org/show_bug.cgi?id=881
After NASM is updated, S files can be removed from Library.
Contributed-under: TianoCore Contribution Agreement 1.1
Signed-off-by: Liming Gao <liming.gao@intel.com>
Reviewed-by: Eric Dong <eric.dong@intel.com>
Reviewed-by: Laszlo Ersek <lersek@redhat.com>
NASM has replaced ASM and S files.
1. Remove ASM from all modules.
2. Remove S files from the drivers only.
3. https://bugzilla.tianocore.org/show_bug.cgi?id=881
After NASM is updated, S files can be removed from Library.
Contributed-under: TianoCore Contribution Agreement 1.1
Signed-off-by: Liming Gao <liming.gao@intel.com>
Reviewed-by: Ruiyu Ni <ruiyu.ni@intel.com>
NASM has replaced ASM and S files.
1. Remove ASM from all modules.
2. Remove S files from the drivers only.
3. https://bugzilla.tianocore.org/show_bug.cgi?id=881
After NASM is updated, S files can be removed from Library.
Contributed-under: TianoCore Contribution Agreement 1.1
Signed-off-by: Liming Gao <liming.gao@intel.com>
Reviewed-by: Michael Kinney <michael.d.kinney@intel.com>
NASM has replaced ASM and S files.
1. Remove ASM from all modules.
2. Remove S files from the drivers only.
3. https://bugzilla.tianocore.org/show_bug.cgi?id=881
After NASM is updated, S files can be removed from Library.
Contributed-under: TianoCore Contribution Agreement 1.1
Signed-off-by: Liming Gao <liming.gao@intel.com>
Reviewed-by: Star Zeng <star.zeng@intel.com>
NASM has replaced ASM and S files.
1. Remove ASM from all modules.
2. Remove S files from the drivers only.
3. https://bugzilla.tianocore.org/show_bug.cgi?id=881
After NASM is updated, S files can be removed from Library.
Contributed-under: TianoCore Contribution Agreement 1.1
Signed-off-by: Liming Gao <liming.gao@intel.com>
Reviewed-by: Michael Kinney <michael.d.kinney@intel.com>
GCC8 reported it with the following warning:
ArmPkg/Library/ArmDisassemblerLib/ArmDisassembler.c: In function 'DisassembleArmInstruction':
ArmPkg/Library/ArmDisassemblerLib/ArmDisassembler.c:397:30: error: bitwise
comparison always evaluates to false [-Werror=tautological-compare]
if ((OpCode & 0x0db00000) == 0x03200000) {
This condition tries to be true for both the immediate and the register
version of the MSR instruction. They get identified inside the if-block
using the variable I, which contains the value of bit 25.
The problem with the comparison reported by GCC is that the
bitmask excludes bit 25, while the value requires it to be set to one:
0x0db00000: 0000 11011 0 11 00 00 0000 000000000000
0x03200000: 0000 00110 0 10 00 00 0000 000000000000
^
So the solution is to just don't require that bit to be set, because
it gets checked later using 'I', which results in the following value:
0x01200000: 0000 00010 0 10 00 00 0000 000000000000
Contributed-under: TianoCore Contribution Agreement 1.1
Signed-off-by: Michael Zimmermann <sigmaepsilon92@gmail.com>
Reviewed-by: Ard Biesheuvel <ard.biesheuvel@linaro.org>
Make the comment align with Edk2 coding style.
Cc: Star Zeng <star.zeng@intel.com>
Cc: Eric Dong <eric.dong@intel.com>
Contributed-under: TianoCore Contribution Agreement 1.1
Signed-off-by: Dandan Bi <dandan.bi@intel.com>
Reviewed-by: Star Zeng <star.zeng@intel.com>
Add support for the following types to VolInfo:
EFI_FV_FILETYPE_MM_STANDALONE
EFI_FV_FILETYPE_MM_CORE_STANDALONE
Contributed-under: TianoCore Contribution Agreement 1.1
Signed-off-by: Ezra Godfrey <egodfrey.qdt@qualcommdatacenter.com>
Reviewed-by: Jiewen Yao <jiewen.yao@intel.com>
If the PCD's datum type is UINT8, UINT16, UINT32 or UINT64, then in
the report will display both hexadecimal format and integer format
of PCD value.
Cc: Liming Gao <liming.gao@intel.com>
Cc: Yonghong Zhu <yonghong.zhu@intel.com>
Contributed-under: TianoCore Contribution Agreement 1.1
Signed-off-by: Yunhua Feng <yunhuax.feng@intel.com>
Reviewed-by: Yonghong Zhu <yonghong.zhu@intel.com>
According to VTd spec, Software writes the value read from this
field (F) to Clear it. But current code is using 0 to clear the
field, that is incorrect.
And R_FSTS_REG register value clearing should be not in the for loop.
Without this patch, we will see same VTd error message appears again
and again after it occurs first time.
Cc: Jiewen Yao <jiewen.yao@intel.com>
Contributed-under: TianoCore Contribution Agreement 1.1
Signed-off-by: Star Zeng <star.zeng@intel.com>
Reviewed-by: Jiewen Yao <jiewen.yao@intel.com>
Gerd Hoffmann
Ruiyu Ni
Yonghong Zhu
Udit Kumar
Liming Gao
Hao Wu
Jaben Carsey
Yunhua Feng
Dandan Bi
Ard Biesheuvel
Derek Lin
Michael Zimmermann
Benjamin You
Leo Duran
Kinney, Michael D
Zhang, Chao B
Ezra Godfrey
Star Zeng