Commit Graph

35 Commits

Author SHA1 Message Date
Maurice Ma aa52bace8f CorebootPayloadPkg: Use generic SerialDxe driver
Use generic SerialDxe driver in MdeModulePkg instead of the one
in CorebootModulePkg. By doing this the reference for
PciSioSerialDxe driver will also be removed from DSC and FDF file.

Cc: Prince Agyeman <prince.agyeman@intel.com>
Contributed-under: TianoCore Contribution Agreement 1.0
Signed-off-by: Maurice Ma <maurice.ma@intel.com>
Reviewed-by: Lee Leahy <leroy.p.leahy@intel.com>
2016-05-13 14:08:56 -07:00
Leahy, Leroy P 0c986eafae CorebootPayloadPkg: Add OHCI driver
Add the USB OHCI driver from revision 24ca2f35 of QuarkSocPkg.

Change-Id: Ie7aa0bc47d4ff06adc57976a5efb0e40ce4e1673
Contributed-under: TianoCore Contribution Agreement 1.0
Signed-off-by: Lee Leahy <leroy.p.leahy@intel.com>
Reviewed-by: Maurice Ma <maurice.ma@intel.com>
2016-05-12 18:11:09 -07:00
Leahy, Leroy P f4e84386c7 CorebootPayloadPkg: Add SD/eMMC support
Add SD and eMMC DXE driver support to CorebootPayloadPkg.

Change-Id: Ibfd3a2cc32a653ce51e38d9157ea3c6da25a5474
Contributed-under: TianoCore Contribution Agreement 1.0
Signed-off-by: Lee Leahy <leroy.p.leahy@intel.com>
Reviewed-by: Maurice Ma <maurice.ma@intel.com>
Reviewed-by: Prince Agyeman <prince.agyeman@intel.com>
2016-05-12 15:56:15 -07:00
Leahy, Leroy P d1b96516ed CorebootPayloadPkg: Set the proper Shell file GUID
Set the proper Shell file GUID so that the BDS transfers control to the
Shell.

Change-Id: I816636a340bbe2f76ac1973b9cb685084c4f88a0
Contributed-under: TianoCore Contribution Agreement 1.0
Signed-off-by: Lee Leahy <leroy.p.leahy@intel.com>
Reviewed-by: Maurice Ma <maurice.ma@intel.com>
Reviewed-by: Prince Agyeman <prince.agyeman@intel.com>
2016-05-12 15:55:50 -07:00
Leahy, Leroy P b18f91c0c5 CorebootPayloadPkg: Use correct BaseSerialPortLib16550
Use the BaseSerialPortLib16550 which sets RTS and DTR during
initialization.  This fixes the mis-matched flow control issue when
the flow control signals are connected between the host and target
and the host has flow control enabled.

Change-Id: I3505e129b2de3c5c17fff23c62553f15cd892dca
Contributed-under: TianoCore Contribution Agreement 1.0
Signed-off-by: Lee Leahy <leroy.p.leahy@intel.com>
Reviewed-by: Maurice Ma <maurice.ma@intel.com>
Reviewed-by: Prince Agyeman <prince.agyeman@intel.com>
2016-05-12 15:55:16 -07:00
Leahy, Leroy P 5a38784b74 CorebootPayloadPkg: Assume no PCI serial devices
Set the vendor to 0xffff which indicates the end of the list.

Change-Id: If6475e04d3675f0a932571a85d1dd3f301416b6a
Contributed-under: TianoCore Contribution Agreement 1.0
Signed-off-by: Lee Leahy <leroy.p.leahy@intel.com>
eviewed-by: Maurice Ma <maurice.ma@intel.com>
Reviewed-by: Prince Agyeman <prince.agyeman@intel.com>
2016-05-12 15:54:42 -07:00
Leahy, Leroy P 1fee349aeb CorebootPayloadPkg: Use DOS line endings
Convert to using DOS line endings.

Change-Id: Ie2f148867d9b2b386d556583afb6716ec21399e9
Contributed-under: TianoCore Contribution Agreement 1.0
Signed-off-by: Lee Leahy <leroy.p.leahy@intel.com>
Reviewed-by: Maurice Ma <maurice.ma@intel.com>
2016-05-12 09:31:25 -07:00
Leahy, Leroy P 24ca2f3507 CorebootPayloadPkg/PlatformBdsLib: Pass more serial parameters
Pass the serial port baudrate, register stride, input clock rate and
ID from coreboot to CorebootPayloadPkg.

Change-Id: I37111d23216e4effa2909337af7e8a6de36b61f7
Contributed-under: TianoCore Contribution Agreement 1.0
Signed-off-by: Lee Leahy <leroy.p.leahy@intel.com>
Reviewed-by: Prince Agyeman <prince.agyeman@intel.com>
2016-05-10 10:13:40 -07:00
Leahy, Leroy P 89ecd4cf80 CorebootPayloadPkg: Use serial drivers with PlatformHookLib
Use the serial drivers which update the serial PCDs from
PlatformHookLib.

Change-Id: Ie6a3526d56332ee1cf07edb24ff39634a981183f
Contributed-under: TianoCore Contribution Agreement 1.0
Signed-off-by: Lee Leahy <leroy.p.leahy@intel.com>
Reviewed-by: Prince Agyeman <prince.agyeman@intel.com>
2016-05-05 16:12:39 -07:00
Leahy, Leroy P 109df3fa54 CorebootPayloadPkg: Allow MaxLogicalProcessorNumber to be changed
Add a define and use it with MaxLogicalProcessorNumber to enable this
PCD to be changed via the command line.  Quark needs to set this value
to one during the builds.

Contributed-under: TianoCore Contribution Agreement 1.0
Signed-off-by: Lee Leahy <leroy.p.leahy@intel.com>
Reviewed-by: Prince Agyeman <prince.agyeman@intel.com>
2016-05-05 16:11:27 -07:00
Leahy, Leroy P ab28ec2bbe CorebootPayloadPkg: Make serial I/O configurable
Allow the serial port configuration to be overriden from the command
line.
Make the debug serial PCDs patchable in module.

Contributed-under: TianoCore Contribution Agreement 1.0
Signed-off-by: Lee Leahy <leroy.p.leahy@intel.com>
Reviewed-by: Prince Agyeman <prince.agyeman@intel.com>
2016-05-05 16:11:05 -07:00
Leahy, Leroy P d3f5d59826 CorebootPayloadPkg: Make shell selectable
Add all of the shell options from ShellBinPkg including building the
shell from source.

Enable link time optimization for GCC debug builds to keep the size
under 0x3e0000.

Test: Use -DSHELL_TYPE=BUILD_SHELL command line options to build the
shell from source.  Run the result on Galileo Gen2.

Change-Id: I1e12adb57960ac5e75e682073540a9322aa03081
Contributed-under: TianoCore Contribution Agreement 1.0
Signed-off-by: Lee Leahy <leroy.p.leahy@intel.com>
Reviewed-by: Prince Agyeman <prince.agyeman@intel.com>
2016-05-05 16:10:40 -07:00
Leahy, Leroy P 81a23a0fee CorebootModulePkg: Remove DuetPkg references
Remove the references to DuetPkg.  Copy the files from revision
ffea0a2ce2 of DuetPkg into
CorebootModulePkg.  The components include:
* PciBusNoEnumerationDxe
* PciRootBridgeNoEnumerationDxe
* SataControllerDxe

TEST=Build and run on Galileo Gen2

Change-Id: Id07185f7e226749e5f7c6b6cb427bcef7eac8496
Contributed-under: TianoCore Contribution Agreement 1.0
Signed-off-by: Lee Leahy <leroy.p.leahy@intel.com>
Reviewed-by: Maurice Ma <maurice.ma@intel.com>
Reviewed-by: Prince Agyeman <prince.agyeman@intel.com>
2016-05-02 15:46:44 -07:00
Leahy, Leroy P 13986b690c CorebootPayloadPkg: Remove trailing white space
Remove trailing white space from existing .dsc and .fdf files.

Contributed-under: TianoCore Contribution Agreement 1.0
Signed-off-by: Lee Leahy <leroy.p.leahy@intel.com>
Reviewed-by: Prince Agyeman <prince.agyeman@intel.com>
2016-05-02 10:57:15 -07:00
Justen, Jordan L eeb69ffc28 CorebootPayloadPkg: Convert to build FatPkg from source
Now that FatPkg is open source (and therefore can be included in the
EDK II tree) we build and use it directly.

Note: Build tested with GCC 5.3 on IA32 and IA32+X64.

Contributed-under: TianoCore Contribution Agreement 1.0
Signed-off-by: Jordan Justen <jordan.l.justen@intel.com>
Reviewed-by: Prince Agyeman <prince.agyeman@intel.com>
2016-04-07 08:47:40 -07:00
Laszlo Ersek 6051996ccc CorebootPayloadPkg: PlatformBdsLib: remove set but unused variables
Cc: Maurice Ma <maurice.ma@intel.com>
Cc: Prince Agyeman <prince.agyeman@intel.com>
Contributed-under: TianoCore Contribution Agreement 1.0
Signed-off-by: Laszlo Ersek <lersek@redhat.com>
Reviewed-by: Jordan Justen <jordan.l.justen@intel.com>
Reviewed-by: Jeff Fan <jeff.fan@intel.com>
2016-03-25 10:52:06 +01:00
Laszlo Ersek ca469b4728 CorebootPayloadPkg: FbGop: remove set but unused variables
Cc: Maurice Ma <maurice.ma@intel.com>
Cc: Prince Agyeman <prince.agyeman@intel.com>
Contributed-under: TianoCore Contribution Agreement 1.0
Signed-off-by: Laszlo Ersek <lersek@redhat.com>
Reviewed-by: Jordan Justen <jordan.l.justen@intel.com>
Reviewed-by: Jeff Fan <jeff.fan@intel.com>
2016-03-25 10:51:54 +01:00
Leahy, Leroy P e968e800ce FW: [PATCH 3/9] CorebootPayloadPkg/PlatformBdsLib: Fix spelling error
-----Original Message-----
From: Leahy, Leroy P
Sent: Friday, March 4, 2016 8:58 AM
To: Ni, Ruiyu <ruiyu.ni@intel.com>; edk2-devel@lists.01.org; Bjorge, Erik C <erik.c.bjorge@intel.com>
Cc: Leahy, Leroy P <leroy.p.leahy@intel.com>
Subject: [PATCH 3/9] CorebootPayloadPkg/PlatformBdsLib: Fix spelling error

Change vender to vendor

Contributed-under: TianoCore Contribution Agreement 1.0
Signed-off-by: Lee Leahy <leroy.p.leahy@intel.com>
Reviewed-by: Prince Agyeman <prince.agyeman@intel.com>
2016-03-07 10:32:47 -08:00
Star Zeng 53f97bdc44 CorebootPayloadPkg PlatformHookLib: Fix GCC build failure
Add return status check to fix GCC build failure below.

error: right-hand operand of comma expression has no effect
[-Werror=unused-value]
((_gPcd_BinaryPatch_PcdSerialUseMmio = (Value)), RETURN_SUCCESS)

error: right-hand operand of comma expression has no effect
[-Werror=unused-value]
((_gPcd_BinaryPatch_PcdSerialRegisterBase = (Value)), RETURN_SUCCESS)

http://article.gmane.org/gmane.comp.bios.edk2.devel/4949

Cc: Maurice Ma <maurice.ma@intel.com>
Cc: Prince Agyeman <prince.agyeman@intel.com>
Cc: Laszlo Ersek <lersek@redhat.com>
Contributed-under: TianoCore Contribution Agreement 1.0
Suggested-by: Laszlo Ersek <lersek@redhat.com>
Signed-off-by: Star Zeng <star.zeng@intel.com>
Reviewed-by: Laszlo Ersek <lersek@redhat.com>
Reviewed-by: Maurice Ma <maurice.ma@intel.com>

git-svn-id: https://svn.code.sf.net/p/edk2/code/trunk/edk2@19069 6f19259b-4bc3-4df7-8a09-765794883524
2015-11-30 21:11:29 +00:00
Star Zeng bae5ddc057 CorebootPayloadPkg: Use SerialDxe in MdeModulePkg
1. Update fdf and dsc to use SerialDxe in MdeModulePkg.
2. Separate the code that gets SerialRegBase and SerialRegAccessType
   by CbParseLib from CorebootPayloadPkg/Library/SerialPortLib to
   PlatformHookLib, and then leverage BaseSerialPortLib16550 in
   MdeModulePkg.
3. Remove CorebootPayloadPkg/SerialDxe and
   CorebootPayloadPkg/Library/SerialPortLib.

Cc: Michael D Kinney <michael.d.kinney@intel.com>
Cc: Liming Gao <liming.gao@intel.com>
Cc: Maurice Ma <maurice.ma@intel.com>
Cc: Prince Agyeman <prince.agyeman@intel.com>
Contributed-under: TianoCore Contribution Agreement 1.0
Signed-off-by: Star Zeng <star.zeng@intel.com>
Reviewed-by: Maurice Ma <maurice.ma@intel.com>

git-svn-id: https://svn.code.sf.net/p/edk2/code/trunk/edk2@18968 6f19259b-4bc3-4df7-8a09-765794883524
2015-11-26 08:49:26 +00:00
Jordan Justen 410952bf8b CorebootPayloadPkgIa32: Don't specify X64 architecture
CorebootPayloadPkg/CorebootPayloadPkgIa32.dsc doesn't use any X64
modules, so it should not specify the X64 architecture.

Contributed-under: TianoCore Contribution Agreement 1.0
Signed-off-by: Jordan Justen <jordan.l.justen@intel.com>
Reviewed-by: Maurice Ma <maurice.ma@intel.com>

git-svn-id: https://svn.code.sf.net/p/edk2/code/trunk/edk2@18073 6f19259b-4bc3-4df7-8a09-765794883524
2015-07-27 06:43:29 +00:00
Guo Dong 244677494b CorebootPayloadPkg: Fix "reset -s" issue.
Fix reboot issue after issuing shell command "reset -s" from UEFI payload.

Contributed-under: TianoCore Contribution Agreement 1.0
Signed-off-by: Guo Dong <guo.dong@intel.com>
Reviewed-by: Maurice Ma <maurice.ma@intel.com>

git-svn-id: https://svn.code.sf.net/p/edk2/code/trunk/edk2@17715 6f19259b-4bc3-4df7-8a09-765794883524
2015-06-25 16:02:16 +00:00
Maurice Ma 4665ec9832 CorebootPayloadPkg: Replace PciHostBridge driver with PciRootBridgeNoEnumeration
Current CorebootPayloadPkg uses PciHostBridge and PciBusNoEnumeration
driver. It will cause the PCI bus resource incorrectly set in root
bridge instance. As a result all PCI devices behind a PCI bridge will
not show up in Shell 'PCI' command.

To resolve it use PciRootBridgeNoEnumeration driver instead.

Contributed-under: TianoCore Contribution Agreement 1.0
Signed-off-by: Maurice Ma <maurice.ma@intel.com>
Reviewed-by: Prince Agyeman <prince.agyeman@intel.com>

git-svn-id: https://svn.code.sf.net/p/edk2/code/trunk/edk2@17408 6f19259b-4bc3-4df7-8a09-765794883524
2015-05-11 15:52:31 +00:00
Ruiyu Ni d43a0a557f CorebootPayloadPkg: Use the new PCDs defined in MdePkg.
Contributed-under: TianoCore Contribution Agreement 1.0
Signed-off-by: Ruiyu Ni <ruiyu.ni@intel.com>
Reviewed-by: Maurice Ma <maurice.ma@intel.com>

git-svn-id: https://svn.code.sf.net/p/edk2/code/trunk/edk2@17325 6f19259b-4bc3-4df7-8a09-765794883524
2015-05-06 04:45:08 +00:00
Jordan Justen 85a468290e Coreboot*Pkg/Contributions.txt: Update example email address
Use the example.com domain as recommended in RFC 2606.

This was changed for the other EDK II packages in r16724.

NOTE: This does not modify the wording of the "TianoCore Contribution
      Agreement 1.0" section

Contributed-under: TianoCore Contribution Agreement 1.0
Signed-off-by: Jordan Justen <jordan.l.justen@intel.com>
Reviewed-by: Maurice Ma <maurice.ma@intel.com>

git-svn-id: https://svn.code.sf.net/p/edk2/code/trunk/edk2@17169 6f19259b-4bc3-4df7-8a09-765794883524
2015-04-14 00:23:29 +00:00
Jordan Justen 9cb46176f4 CorebootPayloadPkg: Rename CorebootPayloadPkgX64.dsc X64 -> Ia32X64
Contributed-under: TianoCore Contribution Agreement 1.0
Signed-off-by: Jordan Justen <jordan.l.justen@intel.com>
Reviewed-by: Maurice Ma <maurice.ma@intel.com>

git-svn-id: https://svn.code.sf.net/p/edk2/code/trunk/edk2@17168 6f19259b-4bc3-4df7-8a09-765794883524
2015-04-14 00:23:17 +00:00
Jordan Justen 92b48344f9 CorebootPayloadPkg: Rename CorebootPayloadPkgIA32.dsc IA32 -> Ia32
Contributed-under: TianoCore Contribution Agreement 1.0
Signed-off-by: Jordan Justen <jordan.l.justen@intel.com>
Reviewed-by: Maurice Ma <maurice.ma@intel.com>

git-svn-id: https://svn.code.sf.net/p/edk2/code/trunk/edk2@17167 6f19259b-4bc3-4df7-8a09-765794883524
2015-04-14 00:23:05 +00:00
Maurice Ma 494820d8c8 CorebootPayloadPkg: Remove empty folder reference in DEC file
In current CorebootPayloadPkg.dec an empty 'Include' directory is
listed in [includes] section. However, this empty directory will
not be mirrored into git repo. If the source tree is pulled from git,
the 'Include' empty folder will not exist and it will cause build
failure. The fix is to remove the whole [Includes] section in the
DEC file.

Contributed-under: TianoCore Contribution Agreement 1.0
Signed-off-by: Maurice Ma <maurice.ma@intel.com>
Reviewed-by: Jordan Justen <jordan.l.justen@intel.com>

git-svn-id: https://svn.code.sf.net/p/edk2/code/trunk/edk2@17164 6f19259b-4bc3-4df7-8a09-765794883524
2015-04-10 22:08:57 +00:00
Scott Duplichan 8e0fdb3aa7 CorebootPayloadPkg: Avoid page table memory allocation failure
Enable use of 1GB pages to avoid page table memory allocation failure.
The failure occurs when allocating enough 4KB pages to map a large
virtual address space, such as the 48-bit virtual address space of AMD
family 10h and family 15h processors. The change is needed only for the
X64 build because page tables are not used by the IA32 build.

Contributed-under: TianoCore Contribution Agreement 1.0
Signed-off-by: Scott Duplichan <scott@notabs.org>
Reviewed-by: Prince Agyeman <prince.agyeman@intel.com>

git-svn-id: https://svn.code.sf.net/p/edk2/code/trunk/edk2@17151 6f19259b-4bc3-4df7-8a09-765794883524
2015-04-10 02:41:49 +00:00
Scott Duplichan 08fc181849 CorebootPayloadPkg: Use unique path for IA32 and X64 payload binaries
Use unique output directory names so that both IA32 and X64 payloads
can be built without overwriting one another.

Contributed-under: TianoCore Contribution Agreement 1.0
Signed-off-by: Scott Duplichan <scott@notabs.org>
Reviewed-by: Prince Agyeman <prince.agyeman@intel.com>

git-svn-id: https://svn.code.sf.net/p/edk2/code/trunk/edk2@17150 6f19259b-4bc3-4df7-8a09-765794883524
2015-04-10 02:41:41 +00:00
Scott Duplichan 090b856b34 CorebootPayloadPkg: Add NOOPT build to accommodate source level debugging
Add NOOPT build to accommodate source level debugging. The NOOPT build
avoids the use of compiler optimization so that every local variable is
accessible by a source level debugger.

Contributed-under: TianoCore Contribution Agreement 1.0
Signed-off-by: Scott Duplichan <scott@notabs.org>
Reviewed-by: Prince Agyeman <prince.agyeman@intel.com>

git-svn-id: https://svn.code.sf.net/p/edk2/code/trunk/edk2@17149 6f19259b-4bc3-4df7-8a09-765794883524
2015-04-10 02:41:36 +00:00
Scott Duplichan 08e9b6f72c CorebootPayloadPkg: Increase payload size limit
Increase payload size limit to accomodate large binaries, such as those
produced by Microsoft NOOPT builds and gcc DEBUG builds.

Contributed-under: TianoCore Contribution Agreement 1.0
Signed-off-by: Scott Duplichan <scott@notabs.org>
Reviewed-by: Maurice Ma <maurice.ma@intel.com>

git-svn-id: https://svn.code.sf.net/p/edk2/code/trunk/edk2@17148 6f19259b-4bc3-4df7-8a09-765794883524
2015-04-10 02:41:32 +00:00
Scott Duplichan 30a3e833ea CorebootPayloadPkg: Use extra braces to prevent gcc compile fail
Use extra braces around initialization data to prevent gcc compile
error: -Werror=missing-braces.

Contributed-under: TianoCore Contribution Agreement 1.0
Signed-off-by: Scott Duplichan <scott@notabs.org>
Reviewed-by: Maurice Ma <maurice.ma@intel.com>

git-svn-id: https://svn.code.sf.net/p/edk2/code/trunk/edk2@17147 6f19259b-4bc3-4df7-8a09-765794883524
2015-04-10 02:41:23 +00:00
Maurice Ma 9c228fb031 Pkg-Module: CorebootPayloadPkg
Initial coreboot UEFI payload code check in. It provides UEFI services on top of coreboot that allows UEFI OS boot.

CorebootPayloadPkg is source code package of coreboot Payload Modules, Provides definitions of payload image's layout and lists the modules required in DSC file.

It supports the following features:
  - Support Unified Extensible Firmware Interface (UEFI) specification 2.4.
  - Support Platform Initialization(PI) specification 1.3.
  - Support execution as a coreboot payload.
  - Support USB 3.0
  - Support SATA/ATA devices.
  - Support EFI aware OS boot.

The following features are not supported currently and have not been validated:
  - GCC Tool Chains
  - SMM Execution Environment
  - Security Boot

It was tested on a Intel Bay Trail CRB platform.

Contributed-under: TianoCore Contribution Agreement 1.0
Signed-off-by: Maurice Ma <maurice.ma@intel.com>
Reviewed-by: Prince Agyeman <prince.agyeman@intel.com>


git-svn-id: https://svn.code.sf.net/p/edk2/code/trunk/edk2@17081 6f19259b-4bc3-4df7-8a09-765794883524
2015-03-31 00:56:01 +00:00
laurie0131 1044ef6be5 Pkg-Module: Add Coreboot Payload Package
Full-commit-message

Contributed-under: TianoCore Contribution Agreement 1.0
Signed-off-by: laurie0131 <Laurie.jarlstrom@intel.com>

git-svn-id: https://svn.code.sf.net/p/edk2/code/trunk/edk2@17074 6f19259b-4bc3-4df7-8a09-765794883524
2015-03-25 21:13:26 +00:00