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53 Commits

Author SHA1 Message Date
vanjeff
ea99e00d76 a)Save and disable CPU interrupt before calling AsmWriteIdtr(). 
b)Restore CPU interrupt status after callng AsmWriteIdtr().


git-svn-id: https://edk2.svn.sourceforge.net/svnroot/edk2/trunk/edk2@9956 6f19259b-4bc3-4df7-8a09-765794883524
 2010-02-09 09:23:17 +00:00
jyao1
3b9be4164b Original MTRR lib hardcode VARIABLE_MTRR as 8. But it is 7 in Core2 if SMRR enabled, and 10 in latest Corei7. 
git-svn-id: https://edk2.svn.sourceforge.net/svnroot/edk2/trunk/edk2@9935 6f19259b-4bc3-4df7-8a09-765794883524
 2010-02-05 06:33:42 +00:00
jljusten
a47463f283 Add CPU DXE driver for IA32 & X64 processor architectures. 
git-svn-id: https://edk2.svn.sourceforge.net/svnroot/edk2/trunk/edk2@8395 6f19259b-4bc3-4df7-8a09-765794883524
 2009-05-27 21:09:47 +00:00