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74376f0b72
There were several bugs in the vector table relocation code which means it can't really have been used by anyone on AArch64 in the last decade or so. So delete the support code from the library, as well as the ArmRelocateExceptionLib.inf file. This gets rid of PcdDebuggerExceptionSupport (including a duff reference in CpuDxe), PcdCpuVectorBaseAddress and PcdRelocateVectorTable. Signed-off-by: Leif Lindholm <leif.lindholm@oss.qualcomm.com>
52 lines
1.3 KiB
C
52 lines
1.3 KiB
C
/** @file
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* Exception Handling support specific for AArch64
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*
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* Copyright (c) 2016 HP Development Company, L.P.
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* Copyright (c) 2021, Arm Limited. All rights reserved.<BR>
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*
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* SPDX-License-Identifier: BSD-2-Clause-Patent
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*
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**/
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#include <Uefi.h>
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#include <AArch64/AArch64.h>
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#include <Library/MemoryAllocationLib.h>
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#include <Protocol/DebugSupport.h> // for MAX_AARCH64_EXCEPTION
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UINTN gMaxExceptionNumber = MAX_AARCH64_EXCEPTION;
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EFI_EXCEPTION_CALLBACK gExceptionHandlers[MAX_AARCH64_EXCEPTION + 1] = { 0 };
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PHYSICAL_ADDRESS gExceptionVectorAlignmentMask = ARM_VECTOR_TABLE_ALIGNMENT;
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#define EL0_STACK_SIZE EFI_PAGES_TO_SIZE(2)
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STATIC UINTN mNewStackBase[EL0_STACK_SIZE / sizeof (UINTN)];
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VOID
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RegisterEl0Stack (
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IN VOID *Stack
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);
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RETURN_STATUS
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ArchVectorConfig (
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IN UINTN VectorBaseAddress
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)
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{
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UINTN HcrReg;
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// Round down sp by 16 bytes alignment
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RegisterEl0Stack (
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(VOID *)(((UINTN)mNewStackBase + EL0_STACK_SIZE) & ~0xFUL)
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);
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if (ArmReadCurrentEL () == AARCH64_EL2) {
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HcrReg = ArmReadHcr ();
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// Trap General Exceptions. All exceptions that would be routed to EL1 are routed to EL2
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HcrReg |= ARM_HCR_TGE;
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ArmWriteHcr (HcrReg);
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}
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return RETURN_SUCCESS;
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}
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