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76e956547e
REF: https://bugzilla.tianocore.org/show_bug.cgi?id=4076 This library is required to make SBI ecalls from the S-mode EDK2. This is mostly copied from edk2-platforms/Silicon/RISC-V/ProcessorPkg/Library/RiscVEdk2SbiLib Cc: Michael D Kinney <michael.d.kinney@intel.com> Cc: Liming Gao <gaoliming@byosoft.com.cn> Cc: Zhiguang Liu <zhiguang.liu@intel.com> Signed-off-by: Sunil V L <sunilvl@ventanamicro.com> Acked-by: Abner Chang <abner.chang@amd.com> Reviewed-by: Andrei Warkentin <andrei.warkentin@intel.com> Reviewed-by: Michael D Kinney <michael.d.kinney@intel.com>
43 lines
1021 B
ArmAsm
43 lines
1021 B
ArmAsm
//------------------------------------------------------------------------------
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//
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// Make ECALL to SBI
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//
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// Copyright (c) 2023, Ventana Micro Systems Inc. All rights reserved.<BR>
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//
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// SPDX-License-Identifier: BSD-2-Clause-Patent
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//
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//------------------------------------------------------------------------------
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#include <Register/RiscV64/RiscVImpl.h>
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.data
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.align 3
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.section .text
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//
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// Make ECALL to SBI
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// ecall updates the same a0 and a1 registers with
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// return values. Hence, the C function which calls
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// this should pass the address of Arg0 and Arg1.
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// This routine saves the address and updates it
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// with a0 and a1 once ecall returns.
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//
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// @param a0 : Pointer to Arg0
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// @param a1 : Pointer to Arg1
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// @param a2 : Arg2
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// @param a3 : Arg3
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// @param a4 : Arg4
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// @param a5 : Arg5
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// @param a6 : FunctionID
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// @param a7 : ExtensionId
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//
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ASM_FUNC (RiscVSbiEcall)
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mv t0, a0
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mv t1, a1
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ld a0, 0(a0)
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ld a1, 0(a1)
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ecall
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sd a0, 0(t0)
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sd a1, 0(t1)
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ret
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