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05a5379458
The VMWare SVGA display device implemented by Qemu (-vga vmware) uses an I/O-type BAR which is laid out such that some register offsets are not aligned to the read/write width with which they are expected to be accessed. (The register value port has an offset of 1 and requires 32 bit wide read/write access.) The EFI_PCI_IO_PROTOCOL's Io.Read/Io.Write functions do not support such unaligned I/O. Before a driver for this device can be added to QemuVideoDxe, helper functions for unaligned I/O are therefore required. This adds the functions UnalignedIoWrite32 and UnalignedIoRead32, based on IoLib's IoWrite32 and IoRead32, for the Ia32 and X64 architectures. Port I/O requires inline assembly, so implementations are provided for the GCC, ICC, and Microsoft compiler families. Such I/O is not possible on other architectures, a dummy (ASSERT()ing) implementation is therefore provided to satisfy the linker. Cc: Jordan Justen <jordan.l.justen@intel.com> Cc: Laszlo Ersek <lersek@redhat.com> Suggested-by: Jordan Justen <jordan.l.justen@intel.com> Contributed-under: TianoCore Contribution Agreement 1.0 Signed-off-by: Phil Dennis-Jordan <phil@philjordan.eu> Reviewed-by: Laszlo Ersek <lersek@redhat.com> Reviewed-by: Jordan Justen <jordan.l.justen@intel.com>