Peter Gonda 62044aa99b OvmfPkg/ResetVector: Removing SEV-ES CPUID bit check ... The SEV-ES bit of Fn800-001F[EAX] - Bit 3 is used for a host to determine support for running SEV-ES guests. It should not be checked by a guest to determine if it is running under SEV-ES. The guest should use the SEV_STATUS MSR Bit 1 to determine if SEV-ES is enabled. This check was not part of the original SEV-ES support and was added in a91b700e38. Removing the check makes this code consistent with the Linux kernel Fixes: a91b700e38 ("Ovmf/ResetVector: Simplify and consolidate the SEV features checks") Signed-off-by: Peter Gonda <pgonda@google.com> Acked-by: Tom Lendacky <thomas.lendacky@amd.com>		2022-06-01 12:52:34 +00:00
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AmdSev.asm	OvmfPkg/ResetVector: Removing SEV-ES CPUID bit check	2022-06-01 12:52:34 +00:00
Flat32ToFlat64.asm	OvmfPkg/ResetVector: cache the SEV status MSR value in workarea	2022-02-28 02:46:08 +00:00
IntelTdx.asm	OvmfPkg: Enable TDX in ResetVector	2021-10-24 02:09:27 +00:00
PageTables64.asm	OvmfPkg: Enable TDX in ResetVector	2021-10-24 02:09:27 +00:00