mirror of https://github.com/acidanthera/audk.git
cfcca3c2de
REF: https://bugzilla.tianocore.org/show_bug.cgi?id=1099 Add SMBIOS 3.2.0 definitions according to www.dmtf.org/sites/default/files/standards/documents/DSP0134_3.2.0.pdf. Processor Information (Type 4): - SMBIOSCR00163: add socket LGA2066 - SMBIOSCR00173: add Intel Core i9 - SMBIOSCR00176: add new processor sockets Port Connector Information (Type 8): - SMBIOSCR00168: add USB Type-C System Slots (Type 9): - SMBIOSCR00164: add "unavailable" to current usage field - SMBIOSCR00167: add support for PCIe bifurcation Memory Device (Type 17): - SMBIOSCR00162: add support for NVDIMMs - SMBIOSCR00166: extend support for NVDIMMs and add support for logical memory type - SMBIOSCR00172: rename "Configured Memory Clock Speed" to "Configured Memory Speed" - SMBIOSCR00174: add new memory technology value (Intel Persistent Memory, 3D XPoint) IPMI Device Information (Type 38): - SMBIOSCR00171: add SSIF Management Controller Host Interface (Type 42) - SMBIOSCR00175: fix structure data parsing issue V2: Add missing update to MISC_PORT_TYPE and SMBIOS_TABLE_TYPE9. Cc: Liming Gao <liming.gao@intel.com> Cc: Dandan Bi <dandan.bi@intel.com> Cc: Michael D Kinney <michael.d.kinney@intel.com> Contributed-under: TianoCore Contribution Agreement 1.1 Signed-off-by: Star Zeng <star.zeng@intel.com> Reviewed-by: Dandan Bi <dandan.bi@intel.com> Reviewed-by: Liming Gao <liming.gao@intel.com> |
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| AArch64 | ||
| Arm | ||
| Ebc | ||
| Guid | ||
| Ia32 | ||
| IndustryStandard | ||
| Ipf | ||
| Library | ||
| Pi | ||
| Ppi | ||
| Protocol | ||
| Uefi | ||
| X64 | ||
| Base.h | ||
| PiDxe.h | ||
| PiMm.h | ||
| PiPei.h | ||
| PiSmm.h | ||
| Uefi.h | ||