audk/IntelFsp2Pkg/Library
Duggapu Chinni B 543add1d41 IntelFsp2Pkg: Fsp T new ARCH UPD Support
Changes to support spec changes

1. Remove usage of Pcd.
2. Change code to validate the Temporary Ram size input.
3. Consume the input saved in YMM Register

Cc: Sai Chaganty <rangasai.v.chaganty@intel.com>
Cc: Nate DeSimone <nathaniel.l.desimone@intel.com>
Cc: Chiu Chasel <chasel.chiu@intel.com>
Cc: Duggapu Chinni B <chinni.b.duggapu@intel.com>
Cc: Ni Ray <ray.ni@intel.com>

Signed-off-by: Duggapu Chinni B <chinni.b.duggapu@intel.com>
Reviewed-by: Chiu Chasel <chasel.chiu@intel.com>
Reviewed-by: Nate DeSimone <nathaniel.l.desimone@intel.com>
2024-04-09 17:15:10 +00:00
..
BaseCacheAsRamLibNull
BaseCacheLib
BaseDebugDeviceLibNull
BaseFspCommonLib
BaseFspDebugLibSerialPort
BaseFspMultiPhaseLib
BaseFspPlatformLib IntelFsp2Pkg: Fsp T new ARCH UPD Support 2024-04-09 17:15:10 +00:00
BaseFspSwitchStackLib IntelFsp2Pkg/SwitchStack: Reserve 32B when calling C function in 64bit 2023-11-03 19:41:25 +00:00
SecFspSecPlatformLibNull