mirror of https://github.com/acidanthera/audk.git
60d8bb9f28
REF:https://bugzilla.tianocore.org/show_bug.cgi?id=3473 X64 Reset Vector Code can access the memory range till 4GB using the Linear-Address Translation to a 2-MByte Page, when user wants to use more than 4G using 2M Page it will leads to use more number of Page table entries. using the 1-GByte Page table user can use more than 4G Memory by reducing the page table entries using 1-GByte Page, this patch attached can access memory range till 512GByte via Linear- Address Translation to a 1-GByte Page. Build Tool: if the nasm is not found it will throw Build errors like FileNotFoundError: [WinError 2]The system cannot find the file specified run the command wil try except block to get meaningful error message Test Result: Tested in both Simulation environment and Hardware both works fine without any issues. Reviewed-by: Ray Ni <ray.ni@intel.com> Cc: Rahul Kumar <rahul1.kumar@intel.com> Cc: Debkumar De <debkumar.de@intel.com> Cc: Harry Han <harry.han@intel.com> Cc: Catharine West <catharine.west@intel.com> Cc: Sangeetha V <sangeetha.v@intel.com> Cc: Rangasai V Chaganty <rangasai.v.chaganty@intel.com> Cc: Sahil Dureja <sahil.dureja@intel.com> Signed-off-by: Ashraf Ali S <ashraf.ali.s@intel.com> |
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|---|---|---|
| .. | ||
| Bin | ||
| Ia16 | ||
| Ia32 | ||
| Tools | ||
| X64 | ||
| Build.py | ||
| CommonMacros.inc | ||
| DebugDisabled.asm | ||
| Main.asm | ||
| PageTables.inc | ||
| Port80Debug.asm | ||
| PostCodes.inc | ||
| ReadMe.txt | ||
| ResetVector.uni | ||
| ResetVectorExtra.uni | ||
| SerialDebug.asm | ||
| Vtf0.inf | ||
| Vtf0.nasmb | ||
ReadMe.txt
=== HOW TO USE VTF0 === Add this line to your FDF FV section: INF RuleOverride=RESET_VECTOR USE = IA32 UefiCpuPkg/ResetVector/Vtf0/Bin/ResetVector.inf (For X64 SEC/PEI change IA32 to X64 => 'USE = X64') In your FDF FFS file rules sections add: [Rule.Common.SEC.RESET_VECTOR] FILE RAW = $(NAMED_GUID) { RAW RAW |.raw } === VTF0 Boot Flow === 1. Transition to IA32 flat mode 2. Locate BFV (Boot Firmware Volume) by checking every 4kb boundary 3. Locate SEC image 4. X64 VTF0 transitions to X64 mode 5. Call SEC image entry point == VTF0 SEC input parameters == All inputs to SEC image are register based: EAX/RAX - Initial value of the EAX register (BIST: Built-in Self Test) DI - 'BP': boot-strap processor, or 'AP': application processor EBP/RBP - Pointer to the start of the Boot Firmware Volume === HOW TO BUILD VTF0 === Dependencies: * Python 3 or newer * Nasm 2.03 or newer To rebuild the VTF0 binaries: 1. Change to VTF0 source dir: UefiCpuPkg/ResetVector/Vtf0 2. nasm and python should be in executable path 3. Run this command: python Build.py 4. Binaries output will be in UefiCpuPkg/ResetVector/Vtf0/Bin