mirror of https://github.com/acidanthera/audk.git
8e4cb8fbce
As shift = (OpCode >> 5) & 0x3, shift will never be larger than 0x3, so the comparison between shift and 0x12 will always be false. The right shift type of ASR is 0x2. Cc: Leif Lindholm <leif@nuviainc.com> Cc: Ard Biesheuvel <ard.biesheuvel@arm.com> Signed-off-by: Wenyi Xie <xiewenyi2@huawei.com> Reviewed-by: Leif Lindholm <leif@nuviainc.com> |
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| .. | ||
| Aarch64Disassembler.c | ||
| ArmDisassembler.c | ||
| ArmDisassemblerLib.inf | ||
| ThumbDisassembler.c | ||