audk/UefiCpuPkg/PiSmmCpuDxeSmm/X64
Jeff Fan ec8a387700 UefiCpuPkg/PiSmmCpuDxeSmm: Decrease mNumberToFinish in AP safe code
We will put APs into hlt-loop in safe code. But we decrease mNumberToFinish
before APs enter into the safe code. Paolo pointed out this gap.

This patch is to move mNumberToFinish decreasing to the safe code. It could
make sure BSP could wait for all APs are running in safe code.

https://bugzilla.tianocore.org/show_bug.cgi?id=216

Reported-by: Paolo Bonzini <pbonzini@redhat.com>
Cc: Laszlo Ersek <lersek@redhat.com>
Cc: Paolo Bonzini <pbonzini@redhat.com>
Cc: Jiewen Yao <jiewen.yao@intel.com>
Cc: Michael D Kinney <michael.d.kinney@intel.com>
Contributed-under: TianoCore Contribution Agreement 1.0
Signed-off-by: Jeff Fan <jeff.fan@intel.com>
Reviewed-by: Paolo Bonzini <pbonzini@redhat.com>
Reviewed-by: Jiewen Yao <jiewen.yao@intel.com>
Tested-by: Laszlo Ersek <lersek@redhat.com>
2016-11-15 09:47:32 +08:00
..
MpFuncs.S
MpFuncs.asm
MpFuncs.nasm UefiCpuPkg PiSmmCpuDxeSmm: Update X64/MpFuncs.nasm 2016-06-28 09:52:16 +08:00
PageTbl.c UefiCpuPkg/PiSmmCpuDxeSmm: Using global semaphores in aligned buffer 2016-05-24 15:20:01 -07:00
Semaphore.c
SmiEntry.S UefiCpuPkg/PiSmmCpu: Always set WP in CR0 2015-11-30 19:57:45 +00:00
SmiEntry.asm UefiCpuPkg/PiSmmCpu: Always set WP in CR0 2015-11-30 19:57:45 +00:00
SmiEntry.nasm UefiCpuPkg PiSmmCpuDxeSmm: Convert X64/SmiEntry.asm to NASM 2016-06-28 09:52:17 +08:00
SmiException.S
SmiException.asm Correct TSS segment. 2015-11-25 04:01:00 +00:00
SmiException.nasm UefiCpuPkg PiSmmCpuDxeSmm: Convert X64/SmiException.asm to NASM 2016-06-28 09:52:18 +08:00
SmmFuncsArch.c UefiCpuPkg/PiSmmCpuDxeSmm: Decrease mNumberToFinish in AP safe code 2016-11-15 09:47:32 +08:00
SmmInit.S
SmmInit.asm
SmmInit.nasm UefiCpuPkg PiSmmCpuDxeSmm: Convert X64/SmmInit.asm to NASM 2016-06-28 09:52:18 +08:00
SmmProfileArch.c UefiCpuPkg: fix ASSERT_EFI_ERROR() typos 2016-06-30 17:27:38 +02:00
SmmProfileArch.h