Ard Biesheuvel 37ec4d9af7 ArmPkg/ArmGicLib: select GICv2 mode if SRE is present but unavailable ... Even if the CPU id registers indicate hardware support for the System Register interface to the GIC, higher exception levels may disable that interface and only allow access through MMIO. So move the enabling of the SRE bit to the GIC version detection routine: if we trigger an exception, we would have anyway at a later stage, so the net effect is the same. However, if setting the bit doesn't stick, it means we can switch to MMIO and proceed normally otherwise. Contributed-under: TianoCore Contribution Agreement 1.0 Signed-off-by: Ard Biesheuvel <ard.biesheuvel@linaro.org> Reviewed-by: Olivier Martin <olivier.martin@arm.com> git-svn-id: https://svn.code.sf.net/p/edk2/code/trunk/edk2@16344 6f19259b-4bc3-4df7-8a09-765794883524		2014-11-13 16:41:51 +00:00
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ArmGicArchLib.c	ArmPkg/ArmGicLib: select GICv2 mode if SRE is present but unavailable	2014-11-13 16:41:51 +00:00