mirror of https://github.com/acidanthera/audk.git
b9d56d0b93
X64\ExceptionHandlerAsm.S define MARCO to set up 32 IDT entries header. It assume GCC compiler will generate the same code length on the following instrction for each IDT entry. jmp ASM_PFX(CommonInterruptEntry) It works with GCC 4.x. However, GCC 5.4 will generate different code size of IDT entry code per the offset value from CommonInterruptEntry address. We should use DB to make sure each IDT entry header has the same size whatever compiler version. .ASM and .nasm used the different solution and do not have this issue. https://bugzilla.tianocore.org/show_bug.cgi?id=389 Cc: Liming Gao <liming.gao@intel.com> Cc: Feng Tian <feng.tian@intel.com> Cc: Michael D Kinney <michael.d.kinney@intel.com> Contributed-under: TianoCore Contribution Agreement 1.0 Signed-off-by: Jeff Fan <jeff.fan@intel.com> Reviewed-by: Liming Gao <liming.gao@intel.com> |
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| .. | ||
| Ia32 | ||
| X64 | ||
| CpuExceptionCommon.c | ||
| CpuExceptionCommon.h | ||
| DxeCpuExceptionHandlerLib.inf | ||
| DxeCpuExceptionHandlerLib.uni | ||
| DxeException.c | ||
| PeiCpuException.c | ||
| PeiCpuExceptionHandlerLib.inf | ||
| PeiCpuExceptionHandlerLib.uni | ||
| PeiDxeSmmCpuException.c | ||
| SecPeiCpuException.c | ||
| SecPeiCpuExceptionHandlerLib.inf | ||
| SecPeiCpuExceptionHandlerLib.uni | ||
| SmmCpuExceptionHandlerLib.inf | ||
| SmmCpuExceptionHandlerLib.uni | ||
| SmmException.c | ||