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audk/MdeModulePkg/Bus/Pci/XhciDxe
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Feng Tian dbe10619bc MdeModulePkg/XhciDxe:1ms delay before access MMIO reg during reset 
Some XHCI host controllers require to have extra 1ms delay before
accessing any MMIO register during HC reset.

As this delay is not defined by XHCI spec, we use this workaround
to fix the issue.

Cc: Star Zeng <star.zeng@intel.com>
Contributed-under: TianoCore Contribution Agreement 1.0
Signed-off-by: Feng Tian <feng.tian@intel.com>
Reviewed-by: Star Zeng <star.zeng@intel.com>
 		2016-09-21 12:42:05 +08:00
..
ComponentName.c
…
ComponentName.h
…
UsbHcMem.c MdeModulePkg: Fix typos in comments and variables 2016-07-11 10:29:48 +08:00
UsbHcMem.h
…
Xhci.c MdeModulePkg/XhciDxe: enable 64-bit PCI DMA 2016-09-06 15:40:49 +01:00
Xhci.h MdeModulePkg/XhciDxe: enable 64-bit PCI DMA 2016-09-06 15:40:49 +01:00
XhciDxe.inf MdeModulePkg: XhciDxe: list ARM and AARCH64 as valid architectures 2015-03-16 19:57:21 +00:00
XhciDxe.uni MdeModulePkg: Convert all .uni files to utf-8 2015-12-15 04:56:23 +00:00
XhciDxeExtra.uni MdeModulePkg: Convert all .uni files to utf-8 2015-12-15 04:56:23 +00:00
XhciReg.c MdeModulePkg/XhciDxe:1ms delay before access MMIO reg during reset 2016-09-21 12:42:05 +08:00
XhciReg.h
…
XhciSched.c MdeModulePkg/XhciDxe: fix a bug on TRB check in async int transfer 2016-07-25 09:37:05 +08:00
XhciSched.h MdeModulePkg/Xhci: Remove TDs from transfer ring when timeout happens 2015-08-26 01:19:09 +00:00