audk/IntelFsp2Pkg
Chasel Chiu f95e80d832 IntelFsp2Pkg/GenCfgOpt.py: Incremental build with UPD in sub DSC.
REF: https://bugzilla.tianocore.org/show_bug.cgi?id=3107

Current script only compares main DSC and output file datetime
to determine if re-generation required or not.
When UPD defined in sub DSC and was modified current script cannot
detect and will not re-generate output files which caused incremental
build issue.

Since UPD can be defined in any sub DSC the script has been updated
to compare all DSC datetime with output files to determine re-generation
is needed or not.

Cc: Maurice Ma <maurice.ma@intel.com>
Cc: Nate DeSimone <nathaniel.l.desimone@intel.com>
Cc: Star Zeng <star.zeng@intel.com>
Signed-off-by: Chasel Chiu <chasel.chiu@intel.com>
Reviewed-by: Nate DeSimone <nathaniel.l.desimone@intel.com>
Reviewed-by: Yuwei Chen <yuwei.chen@intel.com>
Reviewed-by: Star Zeng <star.zeng@intel.com>
Tested-by: Yuwei Chen <yuwei.chen@intel.com>
2020-12-09 12:26:10 +00:00
..
FspNotifyPhase IntelFsp2Pkg: Replace BSD License with BSD+Patent License 2019-04-09 10:58:03 -07:00
FspSecCore IntelFsp2Pkg/FspSecCore: LoadMicrocodeDefault() failed with padding in FV. 2020-10-27 06:06:03 +00:00
Include IntelFsp2Pkg: Add FSP*_ARCH_UPD. 2020-06-23 04:22:49 +00:00
Library IntelFsp2Pkg: Support Multi-Phase SiInit and debug handlers. 2020-05-14 12:34:01 +00:00
Tools IntelFsp2Pkg/GenCfgOpt.py: Incremental build with UPD in sub DSC. 2020-12-09 12:26:10 +00:00
IntelFsp2Pkg.dec IntelFsp2Pkg: add TempRamExitPpi.h. 2019-06-20 12:11:22 +08:00
IntelFsp2Pkg.dsc IntelFsp2Pkg/FspSecCore: Use UefiCpuLib. 2020-06-29 02:13:50 +00:00
Readme.md IntelFsp2Pkg: Convert files to CRLF line ending 2017-04-06 15:42:56 +08:00

Readme.md