mirror of https://github.com/acidanthera/audk.git
231 lines
7.5 KiB
C
231 lines
7.5 KiB
C
/** @file
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Copyright (c) 2008 - 2009, Apple Inc. All rights reserved.<BR>
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This program and the accompanying materials
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are licensed and made available under the terms and conditions of the BSD License
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which accompanies this distribution. The full text of the license may be found at
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http://opensource.org/licenses/bsd-license.php
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THE PROGRAM IS DISTRIBUTED UNDER THE BSD LICENSE ON AN "AS IS" BASIS,
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WITHOUT WARRANTIES OR REPRESENTATIONS OF ANY KIND, EITHER EXPRESS OR IMPLIED.
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**/
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#include "CpuDxe.h"
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//FIXME: Will not compile on non-ARMv7 builds
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#include <Chipset/ArmV7.h>
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VOID
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ExceptionHandlersStart (
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VOID
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);
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VOID
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ExceptionHandlersEnd (
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VOID
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);
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VOID
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CommonExceptionEntry (
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VOID
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);
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VOID
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AsmCommonExceptionEntry (
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VOID
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);
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EFI_EXCEPTION_CALLBACK gExceptionHandlers[MAX_ARM_EXCEPTION + 1];
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EFI_EXCEPTION_CALLBACK gDebuggerExceptionHandlers[MAX_ARM_EXCEPTION + 1];
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/**
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This function registers and enables the handler specified by InterruptHandler for a processor
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interrupt or exception type specified by InterruptType. If InterruptHandler is NULL, then the
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handler for the processor interrupt or exception type specified by InterruptType is uninstalled.
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The installed handler is called once for each processor interrupt or exception.
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@param InterruptType A pointer to the processor's current interrupt state. Set to TRUE if interrupts
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are enabled and FALSE if interrupts are disabled.
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@param InterruptHandler A pointer to a function of type EFI_CPU_INTERRUPT_HANDLER that is called
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when a processor interrupt occurs. If this parameter is NULL, then the handler
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will be uninstalled.
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@retval EFI_SUCCESS The handler for the processor interrupt was successfully installed or uninstalled.
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@retval EFI_ALREADY_STARTED InterruptHandler is not NULL, and a handler for InterruptType was
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previously installed.
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@retval EFI_INVALID_PARAMETER InterruptHandler is NULL, and a handler for InterruptType was not
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previously installed.
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@retval EFI_UNSUPPORTED The interrupt specified by InterruptType is not supported.
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**/
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EFI_STATUS
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RegisterInterruptHandler (
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IN EFI_EXCEPTION_TYPE InterruptType,
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IN EFI_CPU_INTERRUPT_HANDLER InterruptHandler
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)
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{
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if (InterruptType > MAX_ARM_EXCEPTION) {
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return EFI_UNSUPPORTED;
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}
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if ((InterruptHandler != NULL) && (gExceptionHandlers[InterruptType] != NULL)) {
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return EFI_ALREADY_STARTED;
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}
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gExceptionHandlers[InterruptType] = InterruptHandler;
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return EFI_SUCCESS;
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}
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VOID
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EFIAPI
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CommonCExceptionHandler (
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IN EFI_EXCEPTION_TYPE ExceptionType,
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IN OUT EFI_SYSTEM_CONTEXT SystemContext
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)
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{
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if (ExceptionType <= MAX_ARM_EXCEPTION) {
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if (gExceptionHandlers[ExceptionType]) {
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gExceptionHandlers[ExceptionType] (ExceptionType, SystemContext);
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return;
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}
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} else {
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DEBUG ((EFI_D_ERROR, "Unknown exception type %d from %08x\n", ExceptionType, SystemContext.SystemContextArm->PC));
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ASSERT (FALSE);
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}
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if (ExceptionType == EXCEPT_ARM_SOFTWARE_INTERRUPT) {
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//
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// ARM JTAG debuggers some times use this vector, so it is not an error to get one
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//
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return;
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}
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DefaultExceptionHandler (ExceptionType, SystemContext);
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}
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EFI_STATUS
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InitializeExceptions (
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IN EFI_CPU_ARCH_PROTOCOL *Cpu
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)
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{
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EFI_STATUS Status;
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UINTN Offset;
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UINTN Length;
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UINTN Index;
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BOOLEAN IrqEnabled;
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BOOLEAN FiqEnabled;
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EFI_PHYSICAL_ADDRESS Base;
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UINT32 *VectorBase;
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Status = EFI_SUCCESS;
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ZeroMem (gExceptionHandlers,sizeof(*gExceptionHandlers));
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//
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// Disable interrupts
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//
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Cpu->GetInterruptState (Cpu, &IrqEnabled);
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Cpu->DisableInterrupt (Cpu);
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//
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// EFI does not use the FIQ, but a debugger might so we must disable
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// as we take over the exception vectors.
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//
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FiqEnabled = ArmGetFiqState ();
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ArmDisableFiq ();
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if (FeaturePcdGet(PcdRelocateVectorTable) == TRUE) {
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//
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// Copy an implementation of the ARM exception vectors to PcdCpuVectorBaseAddress.
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//
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Length = (UINTN)ExceptionHandlersEnd - (UINTN)ExceptionHandlersStart;
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// Check if the exception vector is in the low address
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if (PcdGet32 (PcdCpuVectorBaseAddress) == 0x0) {
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// Set SCTLR.V to 0 to enable VBAR to be used
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ArmSetLowVectors ();
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} else {
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ArmSetHighVectors ();
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}
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//
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// Reserve space for the exception handlers
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//
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Base = (EFI_PHYSICAL_ADDRESS)PcdGet32 (PcdCpuVectorBaseAddress);
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VectorBase = (UINT32 *)(UINTN)Base;
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Status = gBS->AllocatePages (AllocateAddress, EfiBootServicesCode, EFI_SIZE_TO_PAGES (Length), &Base);
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// If the request was for memory that's not in the memory map (which is often the case for 0x00000000
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// on embedded systems, for example, we don't want to hang up. So we'll check here for a status of
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// EFI_NOT_FOUND, and continue in that case.
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if (EFI_ERROR(Status) && (Status != EFI_NOT_FOUND)) {
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ASSERT_EFI_ERROR (Status);
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}
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if (FeaturePcdGet(PcdDebuggerExceptionSupport) == TRUE) {
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// Save existing vector table, in case debugger is already hooked in
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CopyMem ((VOID *)gDebuggerExceptionHandlers, (VOID *)VectorBase, sizeof (gDebuggerExceptionHandlers));
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}
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// Copy our assembly code into the page that contains the exception vectors.
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CopyMem ((VOID *)VectorBase, (VOID *)ExceptionHandlersStart, Length);
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//
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// Patch in the common Assembly exception handler
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//
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Offset = (UINTN)CommonExceptionEntry - (UINTN)ExceptionHandlersStart;
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*(UINTN *) ((UINT8 *)(UINTN)PcdGet32 (PcdCpuVectorBaseAddress) + Offset) = (UINTN)AsmCommonExceptionEntry;
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//
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// Initialize the C entry points for interrupts
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//
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for (Index = 0; Index <= MAX_ARM_EXCEPTION; Index++) {
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if (!FeaturePcdGet(PcdDebuggerExceptionSupport) ||
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(gDebuggerExceptionHandlers[Index] == 0) || (gDebuggerExceptionHandlers[Index] == (VOID *)(UINTN)0xEAFFFFFE)) {
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// Exception handler contains branch to vector location (jmp $) so no handler
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// NOTE: This code assumes vectors are ARM and not Thumb code
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Status = RegisterInterruptHandler (Index, NULL);
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ASSERT_EFI_ERROR (Status);
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} else {
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// If the debugger has already hooked put its vector back
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VectorBase[Index] = (UINT32)(UINTN)gDebuggerExceptionHandlers[Index];
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}
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}
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// Flush Caches since we updated executable stuff
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InvalidateInstructionCacheRange ((VOID *)PcdGet32(PcdCpuVectorBaseAddress), Length);
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//Note: On ARM processor with the Security Extension, the Vector Table can be located anywhere in the memory.
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// The Vector Base Address Register defines the location
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ArmWriteVBar (PcdGet32(PcdCpuVectorBaseAddress));
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} else {
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// The Vector table must be 32-byte aligned
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ASSERT(((UINT32)ExceptionHandlersStart & ((1 << 5)-1)) == 0);
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// We do not copy the Exception Table at PcdGet32(PcdCpuVectorBaseAddress). We just set Vector Base Address to point into CpuDxe code.
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ArmWriteVBar ((UINT32)ExceptionHandlersStart);
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}
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if (FiqEnabled) {
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ArmEnableFiq ();
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}
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if (IrqEnabled) {
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//
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// Restore interrupt state
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//
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Status = Cpu->EnableInterrupt (Cpu);
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}
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return Status;
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}
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