mirror of https://github.com/acidanthera/audk.git
6cfeeb71c4
REF: https://bugzilla.tianocore.org/show_bug.cgi?id=3424 Processor location information check needs to updated When Core 0 is disabled. In C1e.c, change MSR_FEATURE_CONFIG to MSR_NEHALEM_POWER_CTL in comments to match the correct MSR name. Signed-off-by: Daoxiang Li <daoxiang.li@intel.com> Cc: Eric Dong <eric.dong@intel.com> Reviewed-by: Ray Ni <ray.ni@intel.com> Cc: Laszlo Ersek <lersek@redhat.com> Cc: Rahul Kumar <rahul1.kumar@intel.com> |
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| .. | ||
| BaseUefiCpuLib | ||
| BaseXApicLib | ||
| BaseXApicX2ApicLib | ||
| CpuCacheInfoLib | ||
| CpuCommonFeaturesLib | ||
| CpuExceptionHandlerLib | ||
| CpuTimerLib | ||
| MicrocodeLib | ||
| MpInitLib | ||
| MpInitLibUp | ||
| MtrrLib | ||
| PlatformSecLibNull | ||
| RegisterCpuFeaturesLib | ||
| SecPeiDxeTimerLibUefiCpu | ||
| SmmCpuFeaturesLib | ||
| SmmCpuPlatformHookLibNull | ||
| VmgExitLibNull | ||