audk/MdeModulePkg/Bus
Hao Wu 27daa8658e MdeModulePkg/AtaAtapiPassThru: Fix possible out of range left shift
REF: https://bugzilla.tianocore.org/show_bug.cgi?id=699

Within function AhciModeInitialization(), left shift operations of 'BIT0'
in the following statements:
"if ((PortImplementBitMap & (BIT0 << Port)) != 0) {"

will incur possible out of range left shift when Port is 31, since
"1 << 31" is possible to exceed the range of type 'int' (signed).

According to the C11 spec, Section 6.5.7:
> 4 The result of E1 << E2 is E1 left-shifted E2 bit positions; vacated
>   bits are filled with zeros. If E1 has an unsigned type, the value
>   of the result is E1 * 2^E2 , reduced modulo one more than the
>   maximum value representable in the result type. If E1 has a signed
>   type and nonnegative value, and E1 * 2^E2 is representable in the
>   result type, then that is the resulting value; otherwise, the
>   behavior is undefined.

This commit explicitly cast 'BIT0' with UINT32 to resolve this issue.

Cc: Steven Shi <steven.shi@intel.com>
Cc: Eric Dong <eric.dong@intel.com>
Contributed-under: TianoCore Contribution Agreement 1.1
Signed-off-by: Hao Wu <hao.a.wu@intel.com>
Reviewed-by: Star Zeng <star.zeng@intel.com>
2017-09-29 16:14:17 +08:00
..
Ata MdeModulePkg/AtaAtapiPassThru: Fix possible out of range left shift 2017-09-29 16:14:17 +08:00
I2c/I2cDxe MdeModulePkg: Convert all .uni files to utf-8 2015-12-15 04:56:23 +00:00
Isa MdeModulePkg: Update comments in SimpleTextInEx according to UEFI 2.7 2017-06-20 09:29:42 +08:00
Pci MdeModulePkg/PciBusDxe: Enable Bus Master on P2P bridges on demand 2017-09-28 12:54:53 +08:00
Scsi MdeModulePkg/ScsiBusDxe: don't produce ScsiIo for nonexistent LUNs, part 2 2017-08-19 00:39:05 +02:00
Sd MdeModulePkg/EmmcDxe: Make sure no extra data is erased by EraseBlocks 2017-08-14 08:45:10 +08:00
Ufs MdeModulePkg/Ufs: Set 'Data Segment Length' field for Write Descriptor 2017-08-02 20:56:53 +08:00
Usb MdeModulePkg/UsbBusDxe: log warning message at DEBUG_WARN level 2017-09-11 22:38:59 +02:00