Jiaxin Wu 87d3a6272c UefiCpuPkg/PiSmmCpuDxeSmm: Iterate page table to find proper entry ... Iterate through the page table to find the appropriate page table entry for page creation if one of the following cases is met: 1) StartBit > EndBit: The PageSize of current entry is bigger than the platform-specified PageSize granularity. 2) IA32_PG_P bit is 0 & IA32_PG_PS bit is not 0: The current entry is present and it's a non-leaf entry. Signed-off-by: Jiaxin Wu <jiaxin.wu@intel.com>		2024-08-02 05:13:42 +00:00
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Cet.nasm	UefiCpuPkg: Use macro CR4_CET_BIT to replace hard code value in Cet.nasm.	2023-12-07 09:43:43 +00:00
PageTbl.c	UefiCpuPkg/PiSmmCpuDxeSmm: Iterate page table to find proper entry	2024-08-02 05:13:42 +00:00
SmiEntry.nasm	UefiCpuPkg: Backup and Restore MSR IA32_U_CET in SMI handler.	2023-12-07 09:43:43 +00:00
SmiException.nasm	UefiCpuPkg/PiSmmCpuDxeSmm: Enable single step after SmmProfile start	2024-08-02 05:13:42 +00:00
SmmFuncsArch.c	UefiCpuPkg:Remove code to wakeup AP and relocate ap	2024-06-04 07:40:27 +00:00
SmmProfileArch.c	UefiCpuPkg: Use GenSmmPageTable() to create Smm S3 page table	2023-06-30 11:07:40 +05:30
SmmProfileArch.h	UefiCpuPkg: Apply uncrustify changes	2021-12-07 17:24:28 +00:00