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bdb1c98f03
In this patch we assume that root bus number 0 is always there (same as before), and scan the rest of the extra root buses, up to and including 255. When an extra root bus is found, we install the PCI root bridge IO protocol for the previous root bus (which might be bus 0 or just the previous extra root bus). The root bridge protocol created thus will report the available bus number range [own bus number, next extra root bus number - 1] The LHS of this interval will be used for the root bus's own number, and the rest of the interval (which might encompass 0 additional elements too) can be used by the PCI bus driver to assign subordinate bus numbers from. (Subordinate buses are provided by PCI bridges that hang off the root bus in question.) For MMIO and IO space allocation, all the root buses share the original [0x8000_0000, 0xFFFF_FFFF] and [0x0, 0xFFFF] ranges, respectively. Cc: Jordan Justen <jordan.l.justen@intel.com> Contributed-under: TianoCore Contribution Agreement 1.0 Signed-off-by: Laszlo Ersek <lersek@redhat.com> Regression-tested-by: Gabriel Somlo <somlo@cmu.edu> Reviewed-by: Jordan Justen <jordan.l.justen@intel.com> git-svn-id: https://svn.code.sf.net/p/edk2/code/trunk/edk2@17962 6f19259b-4bc3-4df7-8a09-765794883524