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audk/UefiCpuPkg/ResetVector/Vtf0
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Liu, Zhiguang cc62b85a4a UefiCpuPkg/ResetVector: Rename macros about page table. 
This patch only renames macro, with no code logic impacted.
Two purpose to rename macro:
1. Align some macro name in PageTables1G.asm and PageTables2M.asm, so
that these two files can be easily combined later.
2. Some Macro names such as PDP are not accurate, since 4 level page
entry also uses this macro. PAGE_NLE (no leaf entry) is better

Cc: Eric Dong <eric.dong@intel.com>
Reviewed-by: Ray Ni <ray.ni@intel.com>
Cc: Rahul Kumar <rahul1.kumar@intel.com>
Tested-by: Gerd Hoffmann <kraxel@redhat.com>
Acked-by: Gerd Hoffmann <kraxel@redhat.com>
Cc: Debkumar De <debkumar.de@intel.com>
Cc: Catharine West <catharine.west@intel.com>
Signed-off-by: Zhiguang Liu <zhiguang.liu@intel.com>
 		2023-05-30 05:55:44 +00:00
..
Bin UefiCpuPkg: Update BFV searching algorithm in VTF0 2022-03-28 02:14:36 +00:00
Ia16 UefiCpuPkg: Supporting S3 in 64bit PEI 2022-12-19 06:12:56 +00:00
Ia32 UefiCpuPkg: Update BFV searching algorithm in VTF0 2022-03-28 02:14:36 +00:00
Tools UefiCpuPkg: ResetVector Tool Support for Python 3 2021-09-09 13:16:48 +00:00
X64 UefiCpuPkg/ResetVector: Rename macros about page table. 2023-05-30 05:55:44 +00:00
Build.py UefiCpuPkg: VTF0 Linear-Address Translation to a 1-GByte Page till 512GB 2021-09-16 14:18:27 +00:00
CommonMacros.inc UefiCpuPkg: Replace BSD License with BSD+Patent License 2019-04-09 10:58:28 -07:00
DebugDisabled.asm UefiCpuPkg: Replace BSD License with BSD+Patent License 2019-04-09 10:58:28 -07:00
Main.asm UefiCpuPkg: Replace BSD License with BSD+Patent License 2019-04-09 10:58:28 -07:00
PageTables.inc UefiCpuPkg: VTF0 Linear-Address Translation to a 1-GByte Page till 512GB 2021-09-16 14:18:27 +00:00
Port80Debug.asm UefiCpuPkg: Replace BSD License with BSD+Patent License 2019-04-09 10:58:28 -07:00
PostCodes.inc UefiCpuPkg: Replace BSD License with BSD+Patent License 2019-04-09 10:58:28 -07:00
ReadMe.txt UefiCpuPkg: VTF0 Linear-Address Translation to a 1-GByte Page till 512GB 2021-09-16 14:18:27 +00:00
ResetVector.uni UefiCpuPkg: Replace BSD License with BSD+Patent License 2019-04-09 10:58:28 -07:00
ResetVectorExtra.uni UefiCpuPkg: Replace BSD License with BSD+Patent License 2019-04-09 10:58:28 -07:00
SerialDebug.asm UefiCpuPkg: Replace BSD License with BSD+Patent License 2019-04-09 10:58:28 -07:00
Vtf0.inf UefiCpuPkg: Replace BSD License with BSD+Patent License 2019-04-09 10:58:28 -07:00
Vtf0.nasmb UefiCpuPkg: VTF0 Linear-Address Translation to a 1-GByte Page till 512GB 2021-09-16 14:18:27 +00:00

ReadMe.txt

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=== HOW TO USE VTF0 ===

Add this line to your FDF FV section:
INF  RuleOverride=RESET_VECTOR USE = IA32 UefiCpuPkg/ResetVector/Vtf0/Bin/ResetVector.inf
(For X64 SEC/PEI change IA32 to X64 => 'USE = X64')

In your FDF FFS file rules sections add:
[Rule.Common.SEC.RESET_VECTOR]
  FILE RAW = $(NAMED_GUID) {
    RAW RAW                |.raw
  }

=== VTF0 Boot Flow ===

1. Transition to IA32 flat mode
2. Locate BFV (Boot Firmware Volume) by checking every 4kb boundary
3. Locate SEC image
4. X64 VTF0 transitions to X64 mode
5. Call SEC image entry point

== VTF0 SEC input parameters ==

All inputs to SEC image are register based:
EAX/RAX - Initial value of the EAX register (BIST: Built-in Self Test)
DI      - 'BP': boot-strap processor, or 'AP': application processor
EBP/RBP - Pointer to the start of the Boot Firmware Volume

=== HOW TO BUILD VTF0 ===

Dependencies:
* Python 3 or newer
* Nasm 2.03 or newer

To rebuild the VTF0 binaries:
1. Change to VTF0 source dir: UefiCpuPkg/ResetVector/Vtf0
2. nasm and python should be in executable path
3. Run this command:
   python Build.py
4. Binaries output will be in UefiCpuPkg/ResetVector/Vtf0/Bin