mirror of https://github.com/acidanthera/audk.git
3ef2071927
REF:https://bugzilla.tianocore.org/show_bug.cgi?id=3870 The new algorithm searches FFS3 GUID first and then FFS2 GUID at every 4KB address in the top 16MB just below 4GB. Reviewed-by: Ray Ni <ray.ni@intel.com> Cc: Debkumar De <debkumar.de@intel.com> Cc: Harry Han <harry.han@intel.com> Cc: Catharine West <catharine.west@intel.com> Reviewed-by: Min Xu <min.m.xu@intel.com> Signed-off-by: Ted Kuo <ted.kuo@intel.com> |
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| .. | ||
| Bin | ||
| Ia16 | ||
| Ia32 | ||
| Tools | ||
| X64 | ||
| Build.py | ||
| CommonMacros.inc | ||
| DebugDisabled.asm | ||
| Main.asm | ||
| PageTables.inc | ||
| Port80Debug.asm | ||
| PostCodes.inc | ||
| ReadMe.txt | ||
| ResetVector.uni | ||
| ResetVectorExtra.uni | ||
| SerialDebug.asm | ||
| Vtf0.inf | ||
| Vtf0.nasmb | ||
ReadMe.txt
=== HOW TO USE VTF0 === Add this line to your FDF FV section: INF RuleOverride=RESET_VECTOR USE = IA32 UefiCpuPkg/ResetVector/Vtf0/Bin/ResetVector.inf (For X64 SEC/PEI change IA32 to X64 => 'USE = X64') In your FDF FFS file rules sections add: [Rule.Common.SEC.RESET_VECTOR] FILE RAW = $(NAMED_GUID) { RAW RAW |.raw } === VTF0 Boot Flow === 1. Transition to IA32 flat mode 2. Locate BFV (Boot Firmware Volume) by checking every 4kb boundary 3. Locate SEC image 4. X64 VTF0 transitions to X64 mode 5. Call SEC image entry point == VTF0 SEC input parameters == All inputs to SEC image are register based: EAX/RAX - Initial value of the EAX register (BIST: Built-in Self Test) DI - 'BP': boot-strap processor, or 'AP': application processor EBP/RBP - Pointer to the start of the Boot Firmware Volume === HOW TO BUILD VTF0 === Dependencies: * Python 3 or newer * Nasm 2.03 or newer To rebuild the VTF0 binaries: 1. Change to VTF0 source dir: UefiCpuPkg/ResetVector/Vtf0 2. nasm and python should be in executable path 3. Run this command: python Build.py 4. Binaries output will be in UefiCpuPkg/ResetVector/Vtf0/Bin