Duggapu Chinni B 543add1d41 IntelFsp2Pkg: Fsp T new ARCH UPD Support ... Changes to support spec changes 1. Remove usage of Pcd. 2. Change code to validate the Temporary Ram size input. 3. Consume the input saved in YMM Register Cc: Sai Chaganty <rangasai.v.chaganty@intel.com> Cc: Nate DeSimone <nathaniel.l.desimone@intel.com> Cc: Chiu Chasel <chasel.chiu@intel.com> Cc: Duggapu Chinni B <chinni.b.duggapu@intel.com> Cc: Ni Ray <ray.ni@intel.com> Signed-off-by: Duggapu Chinni B <chinni.b.duggapu@intel.com> Reviewed-by: Chiu Chasel <chasel.chiu@intel.com> Reviewed-by: Nate DeSimone <nathaniel.l.desimone@intel.com>		2024-04-09 17:15:10 +00:00
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BaseCacheAsRamLibNull	IntelFsp2Pkg: Apply uncrustify changes	2021-12-07 17:24:28 +00:00
BaseCacheLib	IntelFsp2Pkg: Apply uncrustify changes	2021-12-07 17:24:28 +00:00
BaseDebugDeviceLibNull	IntelFsp2Pkg: Replace BSD License with BSD+Patent License	2019-04-09 10:58:03 -07:00
BaseFspCommonLib	IntelFsp2Pkg: Add get and set FspSmmInit upd data pointer functions	2023-08-28 21:25:11 +00:00
BaseFspDebugLibSerialPort	IntelFsp2Pkg: Fix code formatting errors	2022-10-04 16:53:59 +00:00
BaseFspMultiPhaseLib	IntelFsp2Pkg/BaseFspMultiPhaseLib: Replace duplicate GUID	2022-10-04 16:53:59 +00:00
BaseFspPlatformLib	IntelFsp2Pkg: Fsp T new ARCH UPD Support	2024-04-09 17:15:10 +00:00
BaseFspSwitchStackLib	IntelFsp2Pkg/SwitchStack: Reserve 32B when calling C function in 64bit	2023-11-03 19:41:25 +00:00
SecFspSecPlatformLibNull	IntelFsp2Pkg: Add FSP 2.4 MultiPhase interface.	2022-08-31 16:48:07 +00:00