mirror of https://github.com/acidanthera/audk.git
5458faf845
The AArch64 DAIF bits are different for reading (mrs) versus writing (msr). The bitmask definitions assumed they were the same causing incorrect results when trying to determine the current interrupt state through GetInterruptState. The logic for interpreting the DAIF read data using the csel instruction was also incorrect and is fixed. Replaced the magic numbers in DisableInterrupts.S and EnableInterrupts.S with definitions for the DAIF write (daifset/daifclr) IRQ field. Contributed-under: TianoCore Contribution Agreement 1.0 Signed-off-by: Eugene Cohen <eugene@hp.com> Reviewed-by: Ard Biesheuvel <ard.biesheuvel@linaro.org> |
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|---|---|---|
| .. | ||
| AArch64 | ||
| Arm | ||
| Ebc | ||
| Ia32 | ||
| Ipf | ||
| X64 | ||
| ARShiftU64.c | ||
| BaseLib.inf | ||
| BaseLib.uni | ||
| BaseLibInternals.h | ||
| BitField.c | ||
| CheckSum.c | ||
| ChkStkGcc.c | ||
| Cpu.c | ||
| CpuDeadLoop.c | ||
| DivS64x64Remainder.c | ||
| DivU64x32.c | ||
| DivU64x32Remainder.c | ||
| DivU64x64Remainder.c | ||
| FilePaths.c | ||
| GetPowerOfTwo32.c | ||
| GetPowerOfTwo64.c | ||
| HighBitSet32.c | ||
| HighBitSet64.c | ||
| LRotU32.c | ||
| LRotU64.c | ||
| LShiftU64.c | ||
| LinkedList.c | ||
| LongJump.c | ||
| LowBitSet32.c | ||
| LowBitSet64.c | ||
| Math64.c | ||
| ModU64x32.c | ||
| MultS64x64.c | ||
| MultU64x32.c | ||
| MultU64x64.c | ||
| RRotU32.c | ||
| RRotU64.c | ||
| RShiftU64.c | ||
| SafeString.c | ||
| SetJump.c | ||
| String.c | ||
| SwapBytes16.c | ||
| SwapBytes32.c | ||
| SwapBytes64.c | ||
| SwitchStack.c | ||
| Unaligned.c | ||
| X86DisablePaging32.c | ||
| X86DisablePaging64.c | ||
| X86EnablePaging32.c | ||
| X86EnablePaging64.c | ||
| X86FxRestore.c | ||
| X86FxSave.c | ||
| X86GetInterruptState.c | ||
| X86MemoryFence.c | ||
| X86Msr.c | ||
| X86ReadGdtr.c | ||
| X86ReadIdtr.c | ||
| X86Thunk.c | ||
| X86WriteGdtr.c | ||
| X86WriteIdtr.c | ||