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audk/UefiCpuPkg/PiSmmCpuDxeSmm/Ia32
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Star Zeng 51ce27fd8c UefiCpuPkg/PiSmmCpuDxeSmm: Centralize mPhysicalAddressBits definition 
Originally (before 714c260301),
mPhysicalAddressBits was only defined in X64 PageTbl.c, after
714c260301, mPhysicalAddressBits is
also defined in Ia32 PageTbl.c, then mPhysicalAddressBits is used in
ConvertMemoryPageAttributes() for address check.

This patch is to centralize mPhysicalAddressBits definition to
PiSmmCpuDxeSmm.c from Ia32 and X64 PageTbl.c.

Cc: Jiewen Yao <jiewen.yao@intel.com>
Cc: Laszlo Ersek <lersek@redhat.com>
Cc: Eric Dong <eric.dong@intel.com>
Suggested-by: Laszlo Ersek <lersek@redhat.com>
Contributed-under: TianoCore Contribution Agreement 1.1
Signed-off-by: Star Zeng <star.zeng@intel.com>
Reviewed-by: Jiewen Yao <jiewen.yao@intel.com>
Reviewed-by: Laszlo Ersek <lersek@redhat.com>
 		2017-08-28 17:19:53 +08:00
..
MpFuncs.S
…
MpFuncs.asm
…
MpFuncs.nasm UefiCpuPkg PiSmmCpuDxeSmm: Update Ia32/MpFuncs.nasm 2016-06-28 09:52:13 +08:00
PageTbl.c UefiCpuPkg/PiSmmCpuDxeSmm: Centralize mPhysicalAddressBits definition 2017-08-28 17:19:53 +08:00
Semaphore.c
…
SmiEntry.S UefiCpuPkg/PiSmmCpuDxeSmm: Add missing JMP instruction 2017-05-19 13:59:27 -07:00
SmiEntry.asm UefiCpuPkg/PiSmmCpuDxeSmm: Fix .S & .asm build failure 2016-12-16 08:27:59 +08:00
SmiEntry.nasm UefiCpuPkg/PiSmmCpuDxeSmm: Remove PSD layout assumptions 2016-12-01 11:07:13 -08:00
SmiException.S UefiCpuPkg/PiSmmCpuDxeSmm: Remove MTRR field from PSD 2016-12-06 23:34:16 -08:00
SmiException.asm UefiCpuPkg/PiSmmCpuDxeSmm: Remove MTRR field from PSD 2016-12-06 23:34:16 -08:00
SmiException.nasm UefiCpuPkg/PiSmmCpuDxeSmm: Remove MTRR field from PSD 2016-12-06 23:34:16 -08:00
SmmFuncsArch.c UefiCpuPkg/PiSmmCpu: Fixed #double fault on #page fault. 2016-12-07 13:13:55 +08:00
SmmInit.S
…
SmmInit.asm
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SmmInit.nasm UefiCpuPkg/PiSmmCpuDxeSmm: remove superfluous ENDs from NASM source 2016-07-18 19:23:01 +02:00
SmmProfileArch.c UefiCpuPkg/PiSmmCpuDxeSmm: Add paging protection. 2016-11-17 16:30:07 +08:00
SmmProfileArch.h
…