mirror of https://github.com/acidanthera/audk.git
edff645fe4
Below code has bug since *BlockEntrySize and *TableLevel are not
updated accordingly:
if (IndexLevel == PageLevel) {
// And get the appropriate BlockEntry at the next level
BlockEntry = (UINT64*)TT_GET_ENTRY_FOR_ADDRESS (TranslationTable, \
IndexLevel + 1, RegionStart);
// Set the last block for this new table
*LastBlockEntry = TT_LAST_BLOCK_ADDRESS(TranslationTable, \
TT_ENTRY_COUNT);
}
Also it doesn't check recursively to get the last level, e.g. the
initial PageLevel is 1 and we already have level 2 and 3 tables at
this address.
What's more, *LastBlockEntry was not updated when we get a table and
IndexLevel != PageLevel.
So we reorganize the sequence, only updating TranslationTable,
PageLevel and BlockEntry in the loop, and setting the other output
parameters with the final PageLevel before returning.
And LastBlockEntry is only an OUT parameter.
Contributed-under: TianoCore Contribution Agreement 1.0
Signed-off-by: Heyi Guo <heyi.guo@linaro.org>
Cc: Leif Lindholm <leif.lindholm@linaro.org>
Reviewed-by: Ard Biesheuvel <ard.biesheuvel@linaro.org>
git-svn-id: https://svn.code.sf.net/p/edk2/code/trunk/edk2@18424 6f19259b-4bc3-4df7-8a09-765794883524
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| .. | ||
| ArmArchTimerLib | ||
| ArmCacheMaintenanceLib | ||
| ArmDisassemblerLib | ||
| ArmDmaLib | ||
| ArmGenericTimerPhyCounterLib | ||
| ArmGenericTimerVirtCounterLib | ||
| ArmGicArchLib | ||
| ArmGicArchSecLib | ||
| ArmHvcLib | ||
| ArmLib | ||
| ArmPsciResetSystemLib | ||
| ArmSmcLib | ||
| ArmSmcLibNull | ||
| BaseMemoryLibStm | ||
| BaseMemoryLibVstm | ||
| BdsLib | ||
| CompilerIntrinsicsLib | ||
| DebugAgentSymbolsBaseLib | ||
| DebugPeCoffExtraActionLib | ||
| DebugUncachedMemoryAllocationLib | ||
| DefaultExceptionHandlerLib | ||
| PeiServicesTablePointerLib | ||
| RvdPeCoffExtraActionLib | ||
| SemiHostingDebugLib | ||
| SemiHostingSerialPortLib | ||
| SemihostLib | ||
| UncachedMemoryAllocationLib | ||