mirror of https://github.com/acidanthera/audk.git
e1999b264f
Bugzilla: 3415 (https://bugzilla.tianocore.org/show_bug.cgi?id=3415) The GICv3 architecture supports up to 1020 ordinary interrupt lines. The actual number of interrupts supported is described by the ITLinesNumber field in the GICD_TYPER register. The total number of implemented registers is normally calculated as 32*(ITLinesNumber+1). However, maximum value (0x1f) is a special case since that would indicate that 1024 interrupts are implemented. Add handling for this special case in ArmGicGetMaxNumInterrupts. Signed-off-by: Andreas Sandberg <andreas.sandberg@arm.com> Signed-off-by: Joey Gouly <joey.gouly@arm.com> Signed-off-by: Sami Mujawar <sami.mujawar@arm.com> Reviewed-by: Ard Biesheuvel <ardb@kernel.org> Reviewed-by: Philippe Mathieu-Daude <philmd@redhat.com> |
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| ArmCrashDumpDxe | ||
| ArmGic | ||
| ArmPciCpuIo2Dxe | ||
| ArmScmiDxe | ||
| CpuDxe | ||
| CpuPei | ||
| GenericWatchdogDxe | ||
| MmCommunicationDxe | ||
| TimerDxe | ||