2011-09-27 18:22:09 +02:00
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//
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2013-05-10 14:41:27 +02:00
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// Copyright (c) 2011-2013, ARM Limited. All rights reserved.
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2011-09-27 18:22:09 +02:00
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//
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2014-08-19 15:29:52 +02:00
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// This program and the accompanying materials
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// are licensed and made available under the terms and conditions of the BSD License
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// which accompanies this distribution. The full text of the license may be found at
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// http://opensource.org/licenses/bsd-license.php
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//
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// THE PROGRAM IS DISTRIBUTED UNDER THE BSD LICENSE ON AN "AS IS" BASIS,
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// WITHOUT WARRANTIES OR REPRESENTATIONS OF ANY KIND, EITHER EXPRESS OR IMPLIED.
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2011-09-27 18:22:09 +02:00
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//
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//
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#include <AutoGen.h>
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#include <AsmMacroIoLib.h>
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#include "SecInternal.h"
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INCLUDE AsmMacroIoLib.inc
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2014-08-19 15:29:52 +02:00
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2011-09-27 18:22:09 +02:00
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IMPORT CEntryPoint
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2013-05-10 14:41:27 +02:00
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IMPORT ArmPlatformIsPrimaryCore
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2013-05-10 14:46:11 +02:00
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IMPORT ArmPlatformGetCorePosition
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2011-09-27 18:22:09 +02:00
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IMPORT ArmPlatformSecBootAction
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2012-05-02 22:13:32 +02:00
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IMPORT ArmPlatformSecBootMemoryInit
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2011-09-27 18:22:09 +02:00
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IMPORT ArmDisableInterrupts
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IMPORT ArmDisableCachesAndMmu
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IMPORT ArmReadMpidr
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2012-05-02 21:55:32 +02:00
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IMPORT ArmCallWFE
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2011-09-27 18:22:09 +02:00
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EXPORT _ModuleEntryPoint
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PRESERVE8
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AREA SecEntryPoint, CODE, READONLY
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2014-08-19 15:29:52 +02:00
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2011-09-27 18:22:09 +02:00
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StartupAddr DCD CEntryPoint
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2012-07-04 22:08:54 +02:00
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_ModuleEntryPoint FUNCTION
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2011-09-27 18:22:09 +02:00
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// First ensure all interrupts are disabled
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2013-05-10 14:33:26 +02:00
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bl ArmDisableInterrupts
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2011-09-27 18:22:09 +02:00
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// Ensure that the MMU and caches are off
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2013-05-10 14:33:26 +02:00
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bl ArmDisableCachesAndMmu
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2011-09-27 18:22:09 +02:00
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2012-07-04 22:08:54 +02:00
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// By default, we are doing a cold boot
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mov r10, #ARM_SEC_COLD_BOOT
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2011-09-27 18:22:09 +02:00
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// Jump to Platform Specific Boot Action function
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blx ArmPlatformSecBootAction
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2014-08-19 15:29:52 +02:00
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_IdentifyCpu
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2011-09-27 18:22:09 +02:00
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// Identify CPU ID
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bl ArmReadMpidr
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2013-05-10 14:41:27 +02:00
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// Keep a copy of the MpId register value
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mov r9, r0
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2011-09-27 18:22:09 +02:00
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// Is it the Primary Core ?
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ARM Packages: Replace tabs by spaces for indentation
Replace tabs by spaces for indentation to comply to EDK2 coding standards.
Done in files with extension ".S", ".c", ".h", ".asm", ".dsc", ".inc", "*.inf",
"*.dec" or ".fdf" and located in ArmPkg, ArmPlatformPkg, EmbeddedPkg,
BeagleBoardPkg or Omap35xxPkg.
Contributed-under: TianoCore Contribution Agreement 1.0
Signed-off-by: Ronald Cron <ronald.cron@arm.com>
Reviewed-By: Olivier Martin <olivier.martin@arm.com>
git-svn-id: https://svn.code.sf.net/p/edk2/code/trunk/edk2@15901 6f19259b-4bc3-4df7-8a09-765794883524
2014-08-26 12:14:17 +02:00
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bl ArmPlatformIsPrimaryCore
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cmp r0, #1
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2011-09-27 18:22:09 +02:00
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// Only the primary core initialize the memory (SMC)
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beq _InitMem
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2014-08-19 15:29:52 +02:00
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2011-09-27 18:22:09 +02:00
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_WaitInitMem
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2012-07-04 22:08:54 +02:00
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// If we are not doing a cold boot in this case we should assume the Initial Memory to be already initialized
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// Otherwise we have to wait the Primary Core to finish the initialization
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cmp r10, #ARM_SEC_COLD_BOOT
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bne _SetupSecondaryCoreStack
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2012-05-02 21:55:32 +02:00
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// Wait for the primary core to initialize the initial memory (event: BOOT_MEM_INIT)
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bl ArmCallWFE
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2011-09-27 18:22:09 +02:00
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// Now the Init Mem is initialized, we setup the secondary core stacks
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b _SetupSecondaryCoreStack
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2014-08-19 15:29:52 +02:00
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2011-09-27 18:22:09 +02:00
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_InitMem
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2012-07-04 22:20:21 +02:00
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// If we are not doing a cold boot in this case we should assume the Initial Memory to be already initialized
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cmp r10, #ARM_SEC_COLD_BOOT
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bne _SetupPrimaryCoreStack
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2011-09-27 18:22:09 +02:00
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// Initialize Init Boot Memory
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2012-05-02 22:13:32 +02:00
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bl ArmPlatformSecBootMemoryInit
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2014-08-19 15:29:52 +02:00
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2011-09-27 18:22:09 +02:00
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_SetupPrimaryCoreStack
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2012-02-28 18:23:53 +01:00
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// Get the top of the primary stacks (and the base of the secondary stacks)
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LoadConstantToReg (FixedPcdGet32(PcdCPUCoresSecStackBase), r1)
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LoadConstantToReg (FixedPcdGet32(PcdCPUCoreSecPrimaryStackSize), r2)
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add r1, r1, r2
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LoadConstantToReg (FixedPcdGet32(PcdSecGlobalVariableSize), r2)
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2011-09-27 18:22:09 +02:00
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// The reserved space for global variable must be 8-bytes aligned for pushing
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// 64-bit variable on the stack
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2012-02-28 18:23:53 +01:00
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SetPrimaryStack (r1, r2, r3)
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b _PrepareArguments
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2011-09-27 18:22:09 +02:00
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_SetupSecondaryCoreStack
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2012-02-28 18:23:53 +01:00
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// Get the top of the primary stacks (and the base of the secondary stacks)
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LoadConstantToReg (FixedPcdGet32(PcdCPUCoresSecStackBase), r1)
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LoadConstantToReg (FixedPcdGet32(PcdCPUCoreSecPrimaryStackSize), r2)
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2013-05-10 14:46:11 +02:00
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add r6, r1, r2
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2012-02-28 18:23:53 +01:00
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2013-05-10 14:46:11 +02:00
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// Get the Core Position
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mov r0, r9
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bl ArmPlatformGetCorePosition
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2011-09-27 18:22:09 +02:00
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// The stack starts at the top of the stack region. Add '1' to the Core Position to get the top of the stack
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add r0, r0, #1
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// StackOffset = CorePos * StackSize
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2012-02-28 18:23:53 +01:00
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LoadConstantToReg (FixedPcdGet32(PcdCPUCoreSecSecondaryStackSize), r2)
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2011-09-27 18:22:09 +02:00
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mul r0, r0, r2
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// SP = StackBase + StackOffset
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2013-05-10 14:46:11 +02:00
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add sp, r6, r0
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2011-09-27 18:22:09 +02:00
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_PrepareArguments
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// Move sec startup address into a data register
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// Ensure we're jumping to FV version of the code (not boot remapped alias)
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ldr r3, StartupAddr
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2014-08-19 15:29:52 +02:00
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2011-09-27 18:22:09 +02:00
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// Jump to SEC C code
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// r0 = mp_id
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2012-07-04 22:08:54 +02:00
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// r1 = Boot Mode
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2013-05-10 14:41:27 +02:00
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mov r0, r9
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2012-07-04 22:08:54 +02:00
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mov r1, r10
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2011-09-27 18:22:09 +02:00
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blx r3
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2012-07-04 22:08:54 +02:00
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ENDFUNC
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2014-08-19 15:29:52 +02:00
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2011-09-27 18:22:09 +02:00
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_NeverReturn
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b _NeverReturn
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END
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